# DAC BASICS, Part 3: Static specifications

In DAC Basics DAC BASICS, Part 2: DAC Architectures, the coverage included three digital-to-analog converter (DAC) topologies (Figure 1 ): a) resistor string DAC, b) R-2R DAC and c) multiplying DAC (MDAC).

Figure 1 As dissimilar as are these three DAC topologies, the specifications and, hence, the electrical description are extremely similar.

We also highlighted the topology differences between these three DAC architectures, while lightly touching their performance differences. However, of these three topologies, the commonality between all DACs is the specification’s definitions and descriptions. Part 3 is about the static DAC specifications.

Static DAC specifications encompass characteristics that describe the DAC in the DC domain. This is where the DAC’s digital and analog timing phenomena are not part of this specification set.

A key static DAC specification is the ideal transfer function (Figure 2 ). From this general transfer function illustration, the definition of the zero-code, offset, full-scale, and gain are easy to realize and understand. Once you understand all of the above definitions, the differential non-linearity (DNL), integral non-linearity (INL), and monotonicity specifications are yet again another derivative of the ideal transfer function.

Figure 2 Ideal DAC transfer function

Figure 2 shows how a DAC generates a discrete number of analog output values for a discrete number of digital input codes. The order of digital input codes in this figure is unipolar, where codes increase in a straight-binary fashion.

The analog range of the transfer function of the DAC in Figure 2 is from zero to the analog output full-scale (FS) value. The DAC voltage reference (VREF ) establishes the converter’s least-significant-bit (LSB) or code width size and sets the full-scale range (FSR). The LSB size is equal to VREF / 2N .

In Figure 2, “N” is equal to the converter’s resolution and 2N equals the number of the converter’s individual bits. The number of codes that the DAC has is equal to 2N . For the 3-bit converter the number of codes is equal to 23 or 8. The transfer formula for this ideal transfer function is equal to VOUT = VREF x (CODE/2N ) and the full scale output voltage equals VREF – 1LSB.

Zero code error

In Figure 3 , the DAC’s zero code error is the easiest static specification to understand. Let's assume this is for a unipolar, single-supply DAC whose perfectly ideal minimum output voltage is zero volts. When you load the DAC registers with digital zeroes, the zero scale error appears on the DAC’s analog output pin. This error is a consequence of the output swing performance of the internal output amplifier. For single-supply DACs, the zero scale error is always positive and the units of this specification are either millivolts or microvolts.

Figure 3 The inability of the DAC’s internal output amplifier to reach the negative power supply rail causes the zero error behavior.

Offset error

The offset error, however, is different. The offset error spans across much of the entire DAC transfer curve. In Figure 4 , the analog offset error is added (or subtracted) from every code of the ideal transfer curve. Visually, you can see how the transfer curve with an offset error is the same as the ideal curve, but moved vertically along the x-axis. The units of this specification are usually millivolts.

Figure 4 Offset error can be either positive or negative but it always impacts every code with the same error.

Gain error

Gain error is a little more difficult to understand. Generally speaking, gain error describes a change in the slope of the ideal DAC curve. Figure 5 illustrates this concept. The gain error specification is usually expressed in percentage of FSR and is calculated following the removal of the offset error.

Figure 5 A DAC’s gain error rotates the ideal transfer function around the zero crossing

Differential non-linearity

Differential non-linearity (DNL) is a static specification that is sometimes called differential-linearity. DNL is the maximum deviation of the actual analog output step from the ideal step value of 1 LSB. This is evaluated throughout the entire actual transfer function curve (Figure 6 ). It is difficult to calibrate out this DAC error because every code may need adjustment.

Figure 6 DNL represents the difference between each actual voltage output and the ideal curve. A 12-bit DAC DNL error curve with x-axis equal to the DAC codes (0 to 4095) and y-axis equal to DNL.

For example, a DAC with a 1.5 LSB output change for a 1 LSB digital code change exhibits half-LSB differential non-linearity. A DNL greater than one may indicate that missing codes exist. The units of measure for differential non-linearity are fractional bits or a percentage of full scale. The errors generated by a DAC with DNL problems come into play in gain control applications.

Monotonicity

Being a musician, I never understood where this term came from. In music, the definition of monotonic is one tone. But, let’s evaluate this DAC specification definition from another perspective.

A differential non-linearity that is less than – 1 LSB creates a non-monotonic transfer function for a DAC (Figure 7 ). If a DAC is non-monotonic, the magnitude of the DAC’s analog output is smaller for an increase in digital input code or vice versa.

Figure 7 Non-monotonic DAC behavior appears as a reversal in the analog out to digital in relationship.

Any non-monotonic behavior that a DAC exhibits may or may not be an issue within a system. For instance, in an audio application one can hear a momentary smaller analog output voltage versus larger input code as imperceptible. In other applications, this could be a distinct problem, which may cause a system oscillation. For instance, in a DC motor control system, a decrease in analog output voltage versus an increase in input code may easily be misread where the system would implement a correction by decreasing the input code.

Integral non-linearity

Another DAC static specification is integral non-linearity (INL), which is a measurement of slight deviation of the DAC’s real transfer function from ideal (Figure 8 ). Integral non-linearity, linearity error, or INL is a culmination of DNL errors. This specification uses a best-fit straight line or end-to-end (end-point linearity) line to quantify INL in LSB units.

Figure 8 The INL specification defines the worst case distance between a best-fit straight line or end-to-end line to the ideal DAC transfer function.

An application like an arbitrary wave form generator requires good INL.

Comparing specifications between datasheets

When comparing one datasheet to another, the specifications may have different units of measure. For example, in one datasheet units for offset error may be volts, while in another datasheet the units may be in LSBs or percent FSR. Table 1 provides tips with the conversion calculations between LSB, volts, percent FSR and PPM (parts per million).

Table 1 Conversion of specification units

Conclusion

The DAC’s offset, gain, INL, and DNL behavior can impact the effectiveness of the overall system in a variety of ways. But, there is more. In the Part 4 of this DAC series we will get involved in the definitions of dynamic specifications, such as settling time, glitch, and noise.

References

## 3 comments on “DAC BASICS, Part 3: Static specifications”

1. bcarso
January 28, 2015

Bonnie, you may be getting to it in later installments, but one of the least-specified things with so-called current-output DACs is the details of degradation associated with terminating the outputs in something less than a very low impedance.  I did a bit of simulation on this, using a standard R-2R topology, and looked at the onset of non-monotonicity.  I tried to find a suitable discussion or similar analysis and couldn't find anything, yet I am sure that such must exist somewhere in the literature.

2. Bonnie Baker
January 28, 2015

Thank you, for quickly looking at this article. You are right there are at lest 9 nstallments to follow this one.

With current out devices, I am most familiar with circuits that have an internal output resistor. This helps you interface with the output stage by getting a good calibrated output. In these circuits, you use an amplifier where the inverting input is connected to the IOUT pin and the amplifier output connected to the RFB pin. Which device are you trying to use in your described circuit?

3. bcarso
January 28, 2015

No specific device, but when I looked at the issue it was in the context of old-fashioned ladder network DACs for audio applications.  I published some of the results on a site devoted to audio, diyaudio.com. I stopped participating on that site quite a while ago.

There were a number of people who commented, and in some cases claimed that people preferred the “sound” when the termination was merely a resistor, and one sometimes rather large.  Apparently non-monotonicity did not correlate with perceived audio quality.

I also suggested that a better output termination would be provided by certain current conveyor topologies, although as usual this provoked the typical response that op amps were good enough and what “everybody” used.  Granted that some can work well, Barrie Gilbert and I agree that they are not optimal.

Paying work intervened before I went further than simulation.