In DAC BASICS, Part 3: Static specifications, we talked about the static specifications and their impact DC characteristics, such as offset, gain, and linearity. These characteristics are generally consistent across the various topologies of the R-2R and string digital-to-analog converters (DACs). In contrast, the glitch-impulse behavior of the R-2R and string DACs are dramatically different.
One can observe a DACs dynamic non-linearity while running at its operating sample rate. There are many reasons, but the most significant ones are glitch-impulse, slew rate / settling time and sample jitter.
One can observe glitch-impulses while running across the DAC’s output range at a consistent sampling rate. Figure 1 shows this phenomenon with the DAC8881, a 16-bit R-2R DAC.
What is happening?
Ideally, the DAC’s output moves from one voltage value to the next in its expected direction. Contrary to this ideal example, real DAC circuits have undershoot or overshoot characteristics during some code-to-code transitions.
This characteristic is not consistently the same from every code-to-code transition. Some transitions are more dramatic than others. The glitch-impulse specification quantifies this characteristic. The DAC glitch-impulses can disrupt a closed-loop system by momentarily outputting erroneous voltages.
Figure 2 shows an example of a DAC with a single lobe glitch-impulse. A string DAC usually produces this type of glitch-impulse.
In Figure 2 , the code transition is from 7FFFh to 8000h. If you convert these numbers to a binary form, notice that every bit in these two hex codes are either switching from 1 to 0 or 0 to 1.
The glitch-impulse specification quantifies the amount of energy in this glitching phenomenon, carrying the units of nano-volts-seconds or nV-sec (GI). This glitch-impulse quantity is equal to the area under the curve.
Single-lobe glitch-impulses are a consequence of the DAC internal switches being out of sync. What causes this DAC phenomenon? The synchronization of the internal DAC switches is not always perfect. As the parasitic switch capacitances charge or discharge, one can see these charge exchanges at the DAC’s output.
R-2R DACs produce two regions of the glitch-impulse error (Figure 3 ). With the dual impulse error, subtract the positive glitch-impulse (G2) from the negative glitch-impulse (G1) to produce the final glitch-impulse specification.
Again, in Figure 3 the code transition is from 7FFFh to 8000h.
In order to understand the sources of a DAC glitch-impulse, we must first define the major-carry transition. A major-carry transition is the point where a MSB is changing from low to high while the lower bits are changing from high to low (or vice versa). An example of this code change is from 0111b to 1000b, or even more dramatic a change from 1000 0000b to 0111 1111b.
One may think that this phenomenon occurs where the output of the DAC exhibits a large change in voltage. This is not the case with virtually every DAC coding scheme. Refer to reference 1 for more details.
Figure 4 and Figure 5 illustrate the impact of this type of glitch with an 8-bit DAC. To the DAC user this phenomena occurs with a single LSB step, or in a 5 V, 8-bit system a 19.5 mV step.
As the DAC loads a code, there are two areas that produce output glitches: switching synchronization, and switch charge transfer of simultaneously triggered multiple switches.
The string DAC has a single switch topology. A string DAC taps into different points on a giant resistor string. The switching network does not require multiple transitions across a major carry and, therefore, is less prone to glitch. There will still be a minor glitch from the switch charge, but it is minimal in comparison to R-2R structure DACs.
The R-2R DAC has multiple simultaneous switches switching during code transitions. Any lack in synchronization leads to a brief period where all switches are high or low, causing the DAC’s voltage output to migrate to the rail. The switches then recover creating a lobe in the opposite direction. The output then settles.
The voltage locations of these glitches are very predictable. With the R-2R DAC, the worst case glitch errors occur when all of the digital bits are toggling while still transitioning with a small voltage output change. This is the case when a DAC code changes with a major carry transition; from codes 1000… to 0111….
Examine real DAC behavior
Now that we have defined the candidate code transitions for glitch-impulse errors, we can take a closer look at an R-2R and string DAC glitch-impulses with the 16-bit DAC8881 (R-2R DAC) and the 16-bit DAC8562 (string DAC).
In Figure 6 , the glitch-impulse of the DAC8881 is 37.7 nV-sec and the glitch-impulse of the DAC8562 is 0.1 nV-sec. In both these pictures, the x-axis scale is 500 ns/div and the y-axis scale is 50 mV/div.
Glitch be gone
If a DAC glitch-impulse problem exists, one can use external components to either decrease the glitch amplitude (Figure 7a), or remove the glitch-impulse energy all together (Figure 7b ).
An RC filter after the DAC decreases the glitch amplitude (Figure 7a ). The glitch-impulse period determines the appropriate RC ratio. The 3 dB frequency of your RC filter is one decade prior to the glitch-impulse frequency. As you select the components, make sure the resistor is low, otherwise it will produce a voltage drop in combination with the resistive load. Since the glitch energy is never lost, the tradeoff for implementing a single pole low-pass filter is to spread out the error while increase the settling time.
A second approach is to use a sample / hold capacitor and amplifier (Figure 7b ). The external switch and amplifier removes the glitch from the DAC internal switching, leaving a small S/H switch transient. In this design, the switch is left open as the DAC crosses over a major carry transition. Once the transition is complete, the switch closes allowing the new output voltage to be set across the CH sampling capacitor. The capacitor continues to hold the new voltage as the external switch opens when the DAC is ready to update its output. This solution is more expensive and uses more board space, but you are able to reduce/remove the glitch without the cost of increased settling time.
Glitch-impulse is one of the important dynamic non-linearity DAC characteristics that you will run into as the device at its operating sampling rate. But, this is only one part of the picture. Other DAC characteristics that can impact high-speed circuits are the slew rate and settling time. Stay tuned for my next article which will be on this topic.