*[Editor's note * : we are presenting this lengthy, insightful article in four parts:

- Part 1 looks at driving high-performance, high-speed ADCs, and benefits to using an input transformer in a differential inverting amplifier design
- Part 2 looks at adding an interstage filter between the amplifier and the ADC
- Part 3 looks at managing SFDR degradation in a low-power interface, and provides and example of broadband, low-power design with tested performance
- Part 4 provides measured results for the test circuit

*Also, for convenience * , the extensive references for all four parts are repeated as a group at the end of each part.]

Considerable progress has been made recently into pushing wideband fully differential amplifiers into the >100dBc SFDR (spur free dynamic range) area with <1nV input referred noise. Wringing the last few dB out of an interface to an ADC can benefit from some simple input side circuit solutions that give both noise and distortion improvements.

The FDA can give a very clean differential I/O gain stage, but then that needs to be carefully interfaced to the ADC to control its output broadband noise spectrum and higher frequency distortion terms into the ADC. Some simple SNR and SFDR combination equations will be presented to explain the FFT results for the combined input interface, filter, and ADC.

This discussion will step through a simple input-side interface to the FDA that offers numerous benefits for an AC coupled, communications oriented, ADC interface requirement. It will then describe output-side interstage-coupling options to translate the FDA output signal to the ADC with a controlled noise power bandwidth. Design equations and tested results will be shown using the recently introduced 4GHz ISL55210 FDA and the low power 12-bit, 500-MSPS ISLA112P50 ADC.

With 12 and 14-bit ADCs moving into the >200MSPS region, Nyquist bandwidths exceeding 150 MHz are showing up in modern system designs. While the ADCs do an excellent job of describing their achievable SFDR and SNR under a wide range of clock and input frequency conditions, those tests are often very narrowband assuming an excellent (expensive) pre-filter to the ADC.

Moving from this characterization condition of lab signal sources, and narrowband filters, to systems requiring a broadband final stage with gain requires a careful consideration of the expected FFT degradation. Even with a perfect input signal to this final stage, the spectrum to the ADC will experience some degradation and added noise in passing through even the best amplifiers.

The final amplifier stage solution to the ADC needs to consider the following issues:

1. Signal gain and flatness through the desired frequency band

2. Convert single to differential if needed

3. Map different common mode operating voltages from the input to the ADC.

4. Maintain extremely low harmonic distortion

5. Introduce some wideband noise power limiting filter between the amplifier and the ADC – and possibly a High pass low end cutoff as well.

6. Present a reasonably low source impedance to the ADC – often a final capacitive element to ground is desirable to shunt sampling glitches off to a low impedance path.

7. Include the ADC input impedance, common mode operating voltage, and any common mode current requirements into the design.

This is a lot to ask in one stage under all imaginable signal path conditions. It is best to break the design issues down into more manageable pieces. Much work has been done to support single-ended to differential designs with DC coupling using FDAs. While possible, most efforts have gotten bogged down into HD2 issues that come with the DC coupled single to differential requirement.

By far the highest SFDR solutions can be delivered if we either come in differential (as is becoming more common with the newer mixer outputs) or convert single=ended to differential using a low cost input transformer. Using an input transformer (or just two blocking capacitors from a differential source) assumes an AC-coupled signal path is acceptable. This may not always be the case but does cover a large range of modern communications digitizer requirements.

**Benefits to using an input transformer in a differential inverting amplifier design **

**Figure 1 ** shows the proposed topology for the input side of the circuit. Here, a single-ended input signal is converted to a differential signal using a low cost, broadband input transformer. There is no lower distortion means of making this conversion at essentially zero power dissipation (aside from some insertion loss).

While this is shown as a single-ended to differential conversion from Vi, if the source is already differential we can still use this approach where n>1 to get some of the benefits or go to two DC blocking caps for an AC coupled design. Here, n is the turns ratio, while most broadband transformers are specified as ohms ratios, which is n^{2} .

*Figure 1. Input transformer to differential inverting design *

*where n=turns ratio. *

There are several subtle benefits to the simple design shown in Figure 1 (first described in **Reference 1** ). When the amplifier is a VFA (Voltage Feedback Amplifier) type, the signal gain can be higher than the noise gain for the amplifier itself. This arises from the source impedance, assumed to be matched to the input impedance looking into the transformer primary, reflecting through as another Rg term on the secondary for noise gain calculation purposes. From Vi to the differential Vo, this circuit gives the voltage gain of **Equation 1** .

While the inverse of the differential voltage divider back to the differential input voltage across the amplifier pins (Noise Gain, NG) is given by **Equation 2** .

This also assumes that Rg is set to provide an input match when looking into the input side of the transformer. This is easily done as the inverting nodes of the amplifier will be a virtual ground so the sum of the two Rg resistors will be the secondary termination over the bandwidth of the amplifier used.

Taking the ratio of signal gain to noise gain (β) gives Eq. 3 where the ratio of Rf/Rg = α has also been substituted, **Equation 3** .

So the input turns ratio gives us “free” gain from a loop gain standpoint. Normally, the turns ratio will vary from 1 to 2 to retain a broadband solution. Higher turns ratios are available, and can certainly be applied, but the transformer bandwidth comes down quickly for turns ratios above 2 (impedance ratios above 4). Looking at just the ratio portion of Eq. 3, it increases as α increases equaling 1 at α = 2. As α-> infinity, this ratio approaches 2.

So operating at α>2 starts to give more signal gain than noise gain even for an n = 1. This benefit is capped at a ratio of 2 (or 6dB) so there is limited benefit to extremely high gains (or α).

But, for example, using an n=1.4 (impedance ratio = 2) and α=4, gives a gain of 5.6V/V (15dB) with a β=1.4×(8/6) = 1.87 (5.4dB) advantage comparing the signal gain to the noise gain. Evaluating Eq. 2 shows this gain of 5.6V/V is operating with a NG = 3 while the amplifier by itself is delivering a signal gain of 4.

This is a slight but useful benefit in that the noise gain sets the VFA loop gain over frequency. All other things being equal, increasing loop gain will decrease distortion directly. So the 5.4dB benefit in this example should drop the distortion terms by 5.4dB vs a simple differential non-inverting op amp at the target gain of 4.0V/V.

This loop gain benefit is not easily available to a CFA (Current Feedback Amplifier) implementation as their loop gains are mainly Rf dependent. In fact, while the circuit of Figure 1 can use CFA devices, since we want the Rg to determine the input match, adjusting Rf as needed to get the desired total gain, there is a limited range of application as the Rf resistor directly sets the loop bandwidth for a CFA.

Going too low with Rf will peak up the response while increasing it beyond its target value will start bandlimiting directly if using a CFA device. Using a VFA in Figure 1 will also have a BW interaction as the noise gain changes, but larger values of Rf can more easily be applied. Since these Rf’s form part of the differential output load, it is also beneficial to increase those above the intended output load to reduce loading induced distortion – and this is much easier using a VFA (vs. CFA) implementations while retaining broad bandwidth over a range of gains.

Another subtle benefit to the topology of Figure 1 is an improved input referred noise. Essentially, a bit of a step-up transformer provides a noiseless voltage gain at the expense of higher source impedance for the current noise terms of the amplifier. Also, for the same reason the NG is < Av, the output noise arising from the FDA’s input voltage noise will have a gain lower than the signal gain (for α >2).

This then input-refers effectively giving an attenuation for the amplifiers’ voltage noise term. Depending on the relative levels of the voltage and current noise terms of amplifier, there will be a range of turns ratio’s over which the input referred noise (or Noise Figure) at Vi will be improved given a target total gain.

To show an example, consider the ISL55210 noise numbers (**Reference 2** ). This 4GHz GainBandwidth Product FDA is a slightly decompensated VFA design which gives a lower differential input noise vs power than a unity gain stable design. The two noise terms for the ISL55210 are:

1. Differential input voltage noise = 0.85nV/√Hz

2. Input current noise on each input = 5pA/√Hz

The input referred noise figure for a circuit like Figure 1, but using two independent op amp amps, is given by **Equation 4** .

Where the following terms are defined:

1. α=Rf/Rg

2. Rs = source impedance, assumed matched by 2Rg/n^{2} (or Rg = Rs×n^{2} /2)

3. kT = 4 x 10^{-21} J at 290°K

4. n = turns ratio of the input transformer.

5. e_{n} = non-inverting input voltage noise for Figure 1 implemented as two op amps

6. i_{b} = Inverting input current noise for Figure 1 implemented as two op amps.

The non-inverting input current noise is neglected in the analysis for independent op amps as the V+ nodes would be going to a low impedance (ground for instance) giving no gain for that noise term.

To use Equation. 4 for the FDA of Figure 1, divide the differential input voltage noise of the ISL55210 by √2. Equation 4 assumes two equal input voltage noise powers and using 0.85nV/1.414 = 0.6nV/√Hz will adjust for the fact that Equation 4 was constructed using dual op amp models (**Reference 3** ).

Fixing two input-turns ratios (1:1.4 and 1:2), which will fix Rg, then sweeping the Rf up to get higher gains, **Figure 2** shows Eq. 4 evaluated over gain using the ISL55210 numbers (0.85/1.41)nV/√Hz voltage noise and 5pA/√Hz current noise) with R_{s} = 50Ω.

*Figure 2. Noise Figure vs. gain for the ISL55210 in Figure 1 circuit. *

This is saying that going to n=2 has already exceeded the optimum minimum noise-figure turns ratio, while both curves show that increasing the total gain monotonically decreases the noise figure.

Another way to look at this is to plot the total input referred voltage noise for these two turns ratios and swept-gain condition. **Figure 3** shows this in linear total gain for the x-axis including all amplifier and resistor noise terms (not including the noise of a 50Ω source). RMS’ing this input noise with a 50Ω noise (.89nV/√Hz) and then multiplying the input noise plotted times the gain on the x-axis will give the total output differential spot noise using the ISL55210 in the circuit of Figure 1.

*Figure 3. Input referred spot noise vs total linear gain for the ISL55210 in Figure 1 circuit. *

For example, if the interface is using a 1:1.4 turns ratio and an amplifier gain setting of 4V/V, the input referred noise in a 50? doubly-terminated system will be about 0.96nV/√Hz. Combining that with a 50Ω source noise will give a total input noise of 1.3nV/√Hz, and then 5.6×1.3nV = 7.3nV/√Hz at the differential outputs.

This output noise becomes the correct place to look when we are trying to estimate the degradation in ADC SNR given this noise and some interstage noise power bandwidth filtering if we are doing that test with just a 50? wideband source termination imspedance.

**[end of part 1] **

**References **

1. “Simple Circuit Techniques Yield High-Dynamic Range Amplifier”, Electronic Design Analog Applications Issue, June22, 1998 pp22-33.

2. ISL55210 data sheet. http://www.intersil.com/data/fn/fn7811.pdf

3. Contact the author for the NF derivation using two op amps in the input transformer coupled differential inverting design.

4. Intersil “Active Filter Designer” http://web.transim.com/iSimFilter/Pages/DesignReq.aspx

5. “Noise Analysis for High Speed Op Amps” TI application note SBOA066A, 1996, Michael Steffes

6. ISL112P50 data sheet. http://www.intersil.com/data/fn/fn7604.pdf

7. “How RF Transformers Work” Mini-Circuits application note http://www.minicircuits.com/pages/pdfs/howxfmerwork.pdf

8. “Spice model simulates broadband transformer”, Michael Steffes EDN Design Ideas, May 11, 1995 pp135-136.

9. Contact author for a copy of the ADT4-1WT model that can be used with Intersil’s iSim PE simulator.

**About the author **

** Michael Steffes ** is Senior Applications Manager, Intersil Corp.with more than 25 years of experience in high-speed amplifier design, applications, and marketing.Previously, he wasthe Market Development Manager for High-Speed Signal Conditioning, and a Distinguished Member of the Technical Staff, at Texas Instruments Inc. With more than 25 years of experience in high-speed amplifier design, applications, and marketing, Michael currently provides product definition and customer design-in support.

Michael earned a BSEE from the University of Kansas and an MBA from Colorado State University. He shares several basic patents in high-speed op amp designs and has written more than 85 product data sheets, scores of contributed articles, applications notes and conference papers.

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