Design a Custom Analog IC in Your Garage

The other day, a reader was surprised when I claimed that anyone could design and manufacture a custom analog IC for about $3,000. I suppose it does seem hard to believe, but it's true. I've done it a few times and had great success every time.

Granted, I've been designing analog ICs since about 1984, but then university students do this on a regular basis. The concept relies on a fairly old crowdfunding model. The nuts and bolts of the process go something like this.

First, you need to acquire some schematic, simulation, and layout tools. These are available for free — LTSPICE, MAGIC, Electric, etc. A great resource for locating free IC design tools is Fedora Labs, which even has great PCB tools.

Then you need to pick a process from one of the multiple fabrication houses that support what is called a multi project wafer (MPW) service. You will need to set up an account with the chosen fabrication house/broker, and that requires signing a nondisclosure agreement. Then you can download its process design kits, which include all the simulation models, some layout examples, bonding pads, and the design rules for the process.

After you have designed, laid out, and verified your circuit, you hand it over to the manufacturer to be merged with other designs from around the world to share the manufacturing costs for a single run. After you hand over the data, it takes up to four months to get your parts in the mail.

There is only one time in this process where money is required. That is when the chips are manufactured and packaged.

There are several MPW manufacturers and processes to choose from. Some popular foundries (or brokers) are X-FAB, CMP, MOSIS, and LFoundry. You can design with a multitude of technologies, but it is best to stay away from the most advanced process nodes (like 90nm) and use a fairly old technology (like 0.35um). This is for two reasons:

  • The design with an advanced process is substantially more complex and requires understanding nuances in the device types that are not included in the models (for example, MOSFET gate leakage current is not zero at 90nm).
  • The price for prototyping goes way up, primarily because the manufacturer must pay highway-robbery prices for the masks used in the process.

A recent check with CMP shows that a 3mm2 die will cost about €1,950 ($2,550) for 25 parts. All MPW houses have fairly similar prices and are located around the world. One can fit more than 100,000 transistors in a 3mm2 die. For analog, that is more than enough.

Though €1,950 is not cheap compared to a PCB run, one can always partner with a few friends and split the price. Universities also get a price break; you might check with your local university and see if you can ride along. If you do share the silicon real estate, just make sure you don't share the pins, power and grounds, or signal lines. Think hotel — separate rooms but a shared lobby. Just imagine if your friend put in a power ground short and killed everyone's project. You may lose your golfing partner.

All MPW manufacturers will manage packaging for the run. This usually means about €1,000 for 10 packaged parts. Generally, all of the money is due up front.

Free design tools can be found, but you might want to consider spending $100 on at least the layout/schematic tools (like Juspertor) to simplify verifications between your schematic and your layout. These generally involve layout versus schematic, design rule, and electrical rules checks. A coupled tool will allow you to cross probe the layout errors to the schematic, extract layout parasitics, and add them to the simulation netlist. You won't need to go back and forth constantly between multiple tools. There may be free tools available that are coupled, but none come to mind.

I've glossed over the finer details, but this is the general flow. One note of caution: IC design is not the same as PCB design in one key way. The former is for perfectionists, and the latter is for people in a hurry. It is easy to swap out caps on a PCB if you chose the wrong value. On an IC, it will take another €2,950 and four months.

I liken troubleshooting an IC to how a doctor troubleshoots a medical problem. When you come in with chest pains, he doesn't immediately slice you open and start swapping organs. Lots of tests are conducted from the outside, and then the doctor makes a highly educated guess on what to do on the inside. Sometimes you're right, and sometimes you're wrong, in which case you keep looping in the process until you get fired or you get frustrated and quit. IC design is not for the faint hearted.

If there is enough interest in the topic, I can blog a bit more about the details. Let me know.

Related posts:


  • Should Process Brokerage Houses Be on Your Roadmap?
  • What’s So Special About This H9X Process?
  • Full Chip Simulation
  • My ASIC+SoC Reassessment
  • 23 comments on “Design a Custom Analog IC in Your Garage

    1. eafpres
      April 15, 2013

      Hi Scott–pretty amazing.  Not something I will ever try!  I'm curious about the 4-month timeframe–is that simply to fill the queue with enough projects/parts to use up an entire wafer?

    2. Vincent Rheaume
      April 15, 2013

      I think fabrication time actually dominates; plus, a low-volume run (like the MPW) isn't a priority for the foundry. In 2011 for my Master's project, our MPW run delivery was delayed by one month due to adverse weather causing power outages, after having already waited 6 months…!  

      April 15, 2013

      I would like to hear more on the custom IC design. Though I was in the semi industry for 12 years, I never did the design side of things and at some time it would be nice to put some old ideas into play. It would be interesting to see the price and time comparison. Plus some information on the level of effort of a design versus a PCB.

    4. Bob @ JVD Inc.
      April 15, 2013

      MPWs are a great tool to get a handful of chips to evaluate without a lot of up-front costs.  We use this technique when appropriate ( to experiment with something very new/novel). They are called shuttles, but not every fab runs shuttles for every process…so you need to select the fab process accordingly…and for those processes for which shuttles are available, the fabs don't necessarily run them continuously …meaning they may run one once a month or once every two months… so, again, “time to chip” may be extended.

      When volume is needed, then the costs pile up. Dedicated mask sets, qualification runs, production test systems (which for analog ICs can be more complex that the IC itself)


    5. Netcrawl
      April 15, 2013

      @eafpres I agree with you! but first I acquire a layout design tool and then shop for a much better operations. Designing IC fabrication for me is not a big deal, with sophisticated software(available for downlaod in the net), I can now edit IC design, I love using layout design tool especially for MCM, its pretty fast.  

    6. Netcrawl
      April 15, 2013

      @Vincent what make you think that-facbrication dominates really dominates? I think its not. Its quite different these days.

    7. vivek@ic_design_ntu
      April 16, 2013

      Dear sir, I am a student at NTU-Singapore , i am very much interested to tape out an IC for my master thesis, the duration of my master thesis is 8 months. Do you think it is a good idea to put my master thesis at stake by going for a tape out. If it is worth it, i would like to know more about the best MPW, and design tools to choose for 90nm technology.

    8. mtripoli
      April 16, 2013

      Thank you Scott for this article. This is an aspect of electronics that has always fascinated me and this article is very well received. I was especially encouraged by the idea that one can undertake this endeavor for little or no money for the tools. Personally, I'd have no problem paying for tools within my budget. I have been under the impression that these tools were on the order of $100K+ ! I will be seriously pursuing this in the coming weeks. I have ideas for a couple of analog IC's that are fairly simple but form the “core” for products that I design. The idea that I could “roll-up” these into an IC that in conjunction with a few more traditional devices is very exciting. Please keep this information coming! If anyone might be interested in working together please let me know.

    9. Katie O'Kew
      April 16, 2013


      When I consider the far greater cost of developing our own flow

      of new products, frequently starting with multi-project wafers, it's

      tempting to try this out some time! It appears to a great way for

      an amateur experimenter to “get someting into silicon”, even in

      the absence of a plan to go beyond 25 pieces. I might even try

      it myself sometime! Thanks for reminding us that there's more

      than one way to skin a cat. (Ouch! My poor feline buddy jumped

      from his Happy Spot when I wrote that. Let it be known that I've

      never skinned a kitty, for will I EVER).

      Katie OQ

    10. Subramanian.Sivaramakrishnan
      April 16, 2013

      I couldn't agree more. Great blog and very useful information. Very generous of an IC design consultant to share this kind of information on where to find (free) tools. Though I am familiar with the MPW process, the information on the tools is very useful. Not that I am going to jump into this right away, but as a philosophy on information sharing and education, I really appreciate this kind of articles. Please keep it coming.

    11. mtripoli
      April 16, 2013

      I couldn't agree more. In fact, with my current schedule I figure something on the order of 2-3 years. Between learning the tools, doing a layout, verification, etc. (for essentially will amount to a handful of opamps in one package).

      I've purchased a few books over the last year concerning this. One “The Art of Analog Layout” by Alan Hastings (which may be far outdated AFAIK) and another (that really gave me the idea that I could do this: “ASIC Design in the Silicon Sandbox” by the late Keith Barr (an amazing story; if you've never heard of him look him up). He fundamentally did what I would like to do. Book suggestions?



    12. PRodg
      April 16, 2013

      Thanks Scott…can you comment about the available PDKs relative to the free design tools?  Usually the foundries provide complete PDKs (electrical models, pcells, rule files, etc..) for only the very expensive design tools such as Cadence.

    13. WKetel
      April 16, 2013

      My question is based far more on the economics of designing a custom analog IC. My question is about what sort of function is needed that is not presently availale from a number of sources? Or is there a need to put 200 channels of a 100MHz A/D converter plus 200 instrument amplifiers all on a 3mm by 3mm chip? My point is that unless space is incredibly tight or the production run is anticipated to be huge, multiple millions of units, that it is probably more cost effective to use components already available and build the systems using a few parts instead of one large ASIC of mixed functionality and unknown yield. 

    14. Brad Albing
      April 30, 2013

      There will be more coming. Stand by.

    15. SunitaT
      April 30, 2013

      Free design tools can be found, but you might want to consider spending $100 on at least the layout/schematic tools (like Juspertor) to simplify verifications between your schematic and your layout.

      @Scott, thanks for the post. I have used Magic layout editor and I find it pretty difficult to use because user interface is pretty poor. I have never used Juspertor. How do you rate the tool compared to the Cadence layout editor ? What extra features Juspertor compared to the free-tools ?

    16. Scott Elder
      May 1, 2013


      “How do you rate the tool compared to the Cadence layout editor ?”

      No comparison.  One costs $100,000.  The other $100.  If you have more money than time, buy Cadence.  If you have more time than money, spend $100.

      What extra features Juspertor compared to the free-tools ?

      I think it is more user friendly.  It supports Open Access.  And there are different levels of purchase with lots of users.  I think that is good from a support standpoint.

      I learned of another tool the other day from  It isn't cheap, but they claim it is compatible with Cadence.  Their price is in the middle.  That means consider that product if you have some money and some time. 🙂

    17. Brad Albing
      May 2, 2013

      Thanks for an answer that gives us a continuum of the cost-time consideration.

    18. adipdutt
      December 2, 2014

      Came up on this grat blog pretty late. I was doing 1.8u (yes that is very big) in 1998, in 2001 joined a fabless company and became an architect of the chip that fired up the first hard-disk version of iPod. Now I am in India and believe me with all the tools and free tools given to Universities, no one wants to go for this kind of work. I think it is because doing analog with a few gates thrown in silicone really needs hardwork and most people – they are better of doing Software. 

      I am forwarding this blog and some of the excellent comments, thanks Scott, and I am ready to team-up (at least techinical discuss)of setting up full system design on a desk, or let us say three desks

    19. sensatech
      August 21, 2015

      I have been using a UK package,  made by Seetrax, XLDesigner, for 25 years now. I also use Orcad but only for simulation. It is asmall company and gives great phone support and the package never crashes. I do alot of adding tracks inthe layout, copying and pasting and the package can always figurw it out when I do an eror check. What would take me aweek to do in Orcad i can do in a day with this package. So easy you don't mind reding huge sections at the end.

    20. Scott Elder
      September 25, 2015

      Hello Adipudtt,  I suppose if one uses tools provided to Universities for doing commercial products, I can accept your claim that no one would use cheap tools.  In the US, Canada, Europe, Japan, etc. that is not a legal option, so the blog points about tools remains relevant.  Even more so today.

      Look me up on line if you want to team up!


    21. adipdutt
      September 25, 2015

      Hi, Scott, yes, your mention of legality is also valid in India, though I am in India,most of my work are for countries where legal systems are more rigid.Even open tools are also helping me. But while giving lectures at apex instutions I found the ignorance of using Open EDA tools is dominant. 

      I am still many steps behind true desktop mixed signal ASIC design/verification, but I look forward in teaming up for sharing of knowledge and re-distributing it for the younger generation.

      Looking forward





    22. traneus
      April 25, 2016

      I did this in a chip-design class in 1994, using MOSIS and MAGIC and 10-micron technology. I offered to do an analog design all by myself, but the instructor preferred that I partner with another student, so I did a digital project. The university was a few miles from a large chip-fabrication plant, so knowledgeable instructors were readily availabe.

      My first Linux distribution, from Nascent Technology in 1994, was aimed at this application and had many open-source chip-design packages. MAGIC was on there, as was a French VHDL-to-chip digital design package. Their ads proclaimed, “Cheap Chip”.

    23. nathandavidson
      October 3, 2018

      There you go. You would obviously need at least some prior experience before you can get down and dirty with IC production. It is not as easy as learning how to brew coffee but it requires some expertise on a certain level. Yes, anyone can fork out that amount of money to make one but would they get the same incredible results? I highly doubt that. Perhaps there could be better explanation on that portion so as to avoid confusing people who are really keen.

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