We like to publish a variety of blogs on Planet Analog. Some provide purely technical information. Some have content that tends to promote a product line from the blogger's company. We are always happy to publish the former and shy away from the latter. Still, we sometimes receive submissions containing solid technical information along with material bordering on advertising. What to do? Let the reader know up front. The following is worth sharing, especially considering its timeliness after Scott Elder's recent blog.
Following up on Scott Elder's post about designing a custom IC, let's look at some of the ways to fabricate your own custom IC. Elder outlined a way to prototype fully custom mixed-signal chips for about $3,000. He proposed using inexpensive design tools and a way to reduce prototyping fabrication costs by utilizing the multi-project wafer (MPW) capabilities offered by a number of foundries.
I have a few thoughts on that proposed approach. First of all, it is a prototype-only solution. Since an MPW run is a shared wafer, you will still need to spend $60,000-$250,000 or more to buy a complete mask set to support production. Also, since there are many users sharing the MPW (including the fab itself), these runs often get delayed to give everybody a chance to get on board. Not always, but often, MPW runs can take six months.
Fully custom analog IC design is an art. It is hard to get good custom analog IC design experience. Many companies say you need 10 years of experience on the expensive EDA tools working at a variety of foundries before they will hire you. (That's a Catch-22, isn't it?)
Your first prototypes will likely have problems. OK, if you've been doing custom analog IC layout at a bunch of different foundries for decades, then maybe you can get your analog IC right the first time. For everybody else, a second or third spin will probably be required to meet your performance specs. A fully custom MPW approach to respins means that you will have to wait another 4-6 months to get revised silicon.
Analog is fun, but we cannot ignore digital. Combining analog and digital on the same IC is a great way to make some really cool stuff. We should have a low-cost, truly mixed-signal chip development flow. I'd like to describe a different approach to semi-custom mixed-signal IC development that is inexpensive, requires less expertise, reduces prototyping time, and eliminates the additional production mask charges.
What if you could create production-ready custom analog ICs like this?
- Your prototypes are production-ready devices, so there's no need to pay extra tooling costs to go from prototypes to production.
- Prototype runs take four weeks, instead of four months.
- Respins also take four weeks.
- You don't have to learn fully custom analog layout.
- You also don't have to learn tons of details about a foundry's process design kit.
- There's no need to write complicated design rule check (DRC) decks for the foundry.
- You can combine analog, digital, processor, memory, and high-voltage electronics in the same design flow.
The approach we use at Triad Semiconductor is to provide a collection of analog and digital IP arranged in die on a semiconductor wafer and overlaid with a global routing fabric. These wafers are kept at the foundry in a partially processed state awaiting final configuration through the creation of vias to make the needed connections. A custom design can be mapped on to such a die using mixed-signal-aware place-and-route software and then sent to the foundry to be processed against staged wafers in a single via mask layer. This layer configures and interconnects the pre-fabricated resources into a custom mixed-signal device.
How do you do this? First, you need to acquire some design tools. We have one that provides a complete mixed-signal design and simulation environment. This tool, which is available for download, combines:
- Hierarchical schematic capture
- SPICE modeling
- Digital HDL entry (VHDL and Verilog syntax-aware editor)
- VHDL-AMS modeling (which speeds up high-level system simulations)
- The ability to combine schematic netlists, SPICE, VHDL, Verilog, and VHDL-AMS in a unified simulation environment.
You design and simulate your entire circuit using this tool. Then you target your design at one of Triad's VCAs. The VCA family includes small devices with dozens of op-amps and 5,000 ASIC gates up to arrays with a million logic gates and 70+ op-amps. Next, instead of moving to a fully custom manual layout, you submit your mixed-signal netlist to Triad's ViaPath software for placing and routing on to a VCA.
But wait — I hear someone saying, “Analog layouts must be lovingly hand crafted from scratch for each and every design.” Can a place-and-route tool adequately connect analog circuits?
We've been working on VCAs and mixed-signal placing and routing since 2002. Our customers include defense, medical, industrial, automotive, and consumer customers with production volumes from hundreds to more than 10 million chips per year. ViaASIC applications combine high-precision, low-offset analog circuits, precision ADCs, high-voltage circuits, and wideband analog. These analog circuits are on the same VCA die with digital items, ARM Cortex-M0 processors, and nonvolatile memory.
Are these designs perfect? Of course not, but they are good enough for lots and lots of mixed-signal circuits, from strategic radiation-hardened applications to FDA Class II medical devices, hazardous gas sensors for first responders, and high-volume mobile computing devices. Basically, we have a team of designers constantly creating new mixed-signal IP, which is made available in the via-configurable fabric of a VCA.
After placing and routing, ViaPath outputs a set of configuration vias. This single via-only mask layer is sent to the foundry and processed against staged wafers. This approach reduces mask charges and fabrication time, and the process is inherently DRC-correct.
Using our software, you can develop your own mixed-signal production-ready ViaASICs for less than $10,000. Our tool can be used to design analog or mixed-signal circuits. At present, access is invitation-only, but in the coming quarters, we will be expanding access. If you have an application that would benefit from ViaASIC integration right now, feel free to contact me and request access to the full flow.
Let us know below whether this information was useful.