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Development of a Spice Op-Amp Macro-Model (Part 1 of 2)

A voltage-feedback amplifier macromodel can simulate common effects such as transient response, frequency response, voltage noise and input/output slew rate limiting. Rather than release full transistor schematics, macromodels can be developed for customers, with accurate simulations conducted from fully extracted 3-D device models. This article provides descriptions of each stage in the model with examples of model performance and correlation to actual device behavior.

The article is presented in two parts as pdf files (no registration required), as follows:

  • Part 1 : Introduction, input stage, gain stage, frequency-shaping stages, noise simulation, and output stage, click here.
  • Part 2 : Simulation results, conclusion, and macromodel netlist, will be posted online on March 1, 2010.

About the authors
Jian Wang was born in China in 1975 and has served as an applications engineer with Intersil since 2005, focusing on high speed amplifiers and drivers. He received a Ph.D. from the University of California at Davis in 2006.

Tamara Schmitz holds BS, MS, and PhD degrees in electrical engineering. She taught analog circuits and test development engineering as an assistant professor at San Jose State University. With eight years of part-time experience in applications engineering, she joined Intersil in August 2007 as a principal applications engineer.

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