Advertisement

Blog

Dispelling Some Fears About Analog IC Design

I was out to dinner in Montreal a few weeks ago. As I walked down the four flights of dark, narrow stairs from the restaurant to the street, I stumbled on the last step and fell on my hands and knees. Ouch. To try and save face, I explained to my dinner hosts that, just about every time I travel outside America, I manage to trip with my feet at least once. Later it struck me why this always happens.

One problem with living in America is that our litigious society has forced rigorous conformity in simple things such as the height of a stair step. This uniformity subconsciously trains people to go about their business mindlessly without worrying about things as basic as watching your step. Some might think this is a good thing, and it might be in the case of staircases. But subconscious dumbing down can also instill unnecessary fears as one's mind reconnects to what was once a very basic process.

Take analog IC engineering. For the past 40 years, most analog ICs have been designed with some form of SPICE simulator. Originally, any engineer who used SPICE knew the value of the parameters GMIN, RELTOL, ITL5, and ABSTOL and how they facilitated a simulation. An engineer could quickly write a text-based net list to simulate a small circuit. SPICE simulators with simple interfaces are still available today — many for free — but the ones that are not free (and cost five or six figures) have effectively mitigated the need to understand basic SPICE aspects. I call this a dumbing down of the design process.

Just like the slip-and-fall laws for staircases, dumbing down SPICE has resulted in fear by many that, unless one has access to expensive design tools to hold your hand, somehow the design won't work or will take much longer to complete. But this just isn't true for a large segment of analog IC engineering.

Despite what many might claim, SPICE hasn't changed since its introduction in the 1970s. Sure, there have been lots of improvements in simulation time and managing larger circuits, but Moore's Law has afforded those improvements. Both the MIPS rate and circuit memory capability have increased at least a millionfold since SPICE first showed up on a PC, while the improvement in SPICE algorithm speed has improved only 10-fold at best.

This dumbing down of the analog IC design process is not limited to SPICE. The same things are true for analog IC layout tools. For nearly 40 years, GDSII (pronounced GDS-two) has been the dominant format for layouts sent to the wafer foundry. It's is not much more than a listing of polygon coordinates. Today, even on the most expensive tools, analog IC layout designers still use a mouse to point at coordinates on a screen to draw a polygon.

The most valuable historical improvement in the analog IC design process over 40 years has been the introduction of multi-project-wafer (MPW) services by pure play foundries. This was the great equalizing event between the Davids and the Goliaths of the analog IC industry.

I can recall several analog IC success stories that are based on low-cost MPW access to silicon prototypes, but I can't recall one analog success story based on the availability of advanced, hand-holding design tools. If anything, expensive tools are standing in the way of advancing the art of integrated analog.

I've tried to be careful in this blog to address only the analog aspects of an IC design. If your requirements are heavily digital — more than a few thousand logic gates — then I certainly concede that digital IC design tools share equal footing with MPW services in terms of advancing the art in IC design. In fact, digital tools are advancing so fast that a modern digital engineer is no longer an electrical circuit engineer.

I also wouldn't have written this blog if advanced analog IC design tools were affordable for a small company or startup in the same way that software tools are for Internet and applications programming. But they aren't — and for very good reason. The size of the market is too small. But don't let that stop you.

If your requirements are for an essentially custom analog IC design with no more than a few thousand gates of logic, then there is very little reason not to set your fears aside and walk down the stairs like you learned when you were two years old. The big difference now is that evaluating your design doesn't require owning a fab. And the quality of the resultant product will be a byproduct of the engineer who runs the tools, as it has been for 40 years. I suppose that statement applies to digital engineering, as well.

Related posts:

21 comments on “Dispelling Some Fears About Analog IC Design

  1. antedeluvian
    December 8, 2013

    Scott

    One problem with living in America is that our litigious society has forced rigorous conformity in simple things such as the height of a stair step.

    I have visited 3 or 4 multi story (3-4) factories in Guandong province in China. I don't want to stretch this to a generality about China, but in every one there were no elevators and not only were the steps not the same rise as USA, but the rise and the size of the tread seemed to be unique to each individual step. At least there was a bannister to steady myself.

  2. Netcrawl
    December 8, 2013

    Therer's also some compliance and regulatory issues, which makes things worst and much more complicated, this could forced the company to take drastic actions. soiftware is a very complex tools, one need to too much attention.   

  3. Davidled
    December 8, 2013

    I guess that each country have their own building requirement because they have a different physical body size comparing with Western people. In more, I think that they have a unique process for analog design based on their education and culture.

  4. Victor Lorenzo
    December 9, 2013

    @Scott, “(…)digital tools are advancing so fast that a modern digital engineer is no longer an electrical circuit engineer “, that holds true not only at silicon level design but also at systems level design.

    Modern day digital circuits/ICs can be considered more like “funtional blocks” than “circuits”. Part of the complexity has moved from schematic capture (functional design) to PCB routing (impedance driven design, tracks length tuning, etc), and that complexity is well managed by the PCB routing tool, provided that the designer has correctly coded into the tool/design/project the proper set of rules and constraints.

  5. Victor Lorenzo
    December 9, 2013

    One problem with living in America is that our litigious society has forced rigorous conformity in simple things such as the height of a stair step

    Simple things like the height of a stair step use to follow simple rules. Do you imagine having to walk over a stair with irregularly shaped steps of different heights with sharp cutting edges…? From my point of view it makes sense to have at least one simple set of rules, not for uniformity but for safety.

    And yes, I agree, because of being so litigious what should have been kept simple has become too/way too complex and 'over-ruled'.

  6. etnapowers
    December 9, 2013

    @Victor: I agree with you on the need of having common rules as reference. According to me this reference need has to be balanced by a flexibility of the same rules. For example I think that an IC designer should have some reference guidelines during a design, but should be free at the same time to find new solutions and new ways to achieve his goal.

  7. etnapowers
    December 9, 2013

    An electronic engineer is desirable to have both of the skills:

    • Functional, block designing for Digital circuits.
    • Analog designing for single block analog design.

    An engineer too specialized only in one of these two aspects won't easily switch to the other type of designing.

  8. Victor Lorenzo
    December 9, 2013

    @etnapowers: “an IC designer should have some reference guidelines during a design, but should be free at the same time to find new solutions and new ways to achieve his goal “, I thought it was already that way, but my knowledge in the IC design world is rather limited. Have you seen it beign in a different way?

  9. etnapowers
    December 9, 2013

    Yes Victor, I know some analog circuits that were designed by a uncommon procedure, and these products were really effective but very new to the market at that time, so the design team had to persist to have these products as part of company portfolio. At the end it was a successful task but the engineers had to struggle with too rigid rules , this is not a good thing to me.

  10. Victor Lorenzo
    December 9, 2013

    An electronic engineer is desirable to have both of the skills

    Sorry, but I'm some times too pedantic on this subject… If He/She fails in acquiring one of those skills… can He/She still be considered an 'Electronic Engineer'? Perhaps it's like in the case for a carpenter, it a must to know how to use the hammer, the saw, the ruler, the pencil…

    Anyway, we some times adapt to new occupations and become managers, programmers, software architects and so on, at the end we lose part of our EE skills but develop some new.

  11. etnapowers
    December 9, 2013

    @Victor, you're welcome, I think that ideally an electronic engineer should experience more aspects of the design activity, but we live in a real world and we have to adapt to the working background we have to face every day.

    I think that an engineer, failing in developing one or more design skills, has equally to be considered an engineer, with some new skills (technical marketing, software architecture, etc…), as you correctly said.

     

  12. etnapowers
    December 9, 2013

    @DaeJ: I agree on this applies also to the IC design, the process is based on education and culture , but it has to be compliant to the market that is global: an IC led driver working in a certain application has to satisfy that requirements and this does not depends from where the designers come from. For buildings this is quite different.

  13. Scott Elder
    December 9, 2013

    @etnapowers,

    I think when one starts designing huge digital blocks at the IC level, the probability of finding one engineer that is an expert in both analog and digital, is very low.  Digital is less and less about circuits, so circuit expertise has little value.

    One needs to be careful that they don't become “a jack of all trades, master of none”.

  14. Victor Lorenzo
    December 9, 2013

    I've had the impression that at present silicon (IC) manufacturers are putting great deal of effort in simplifying how the rest of the system interfaces to their chips, being SoC/PSoCs simple examples. Presummably this leads them to a higher/increased IC design complexity requiring higher qualification engineers. Is that correct?

  15. Scott Elder
    December 9, 2013

    @Victor,

    Inside most SoCs, the sophistication of circuits requires two different experts.  The digital engineers work more like programmers–mostly text based.  The analog engineers work mostly GUI based.  So I don't think it is necessarily a requirement for higher qualifications, but rather a narrowing of the required discipline.

    I believe that in the not too distant future, analog engineers will become the primary IC designers using digital GUI tools for the digital circuits.  For example, one can buy a product from Mathworks called HDLCoder.  That basically takes a Simulink block diagram and generates Verilog code.  So an analog engineer can “write” their own digital code without being an expert in Verilog or VHDL.  So the digital engineers become the programmers that create code for, say, Simulink blocks.

     

  16. Victor Lorenzo
    December 9, 2013

    @Scott, It is very interesting what you comment, thanks. I suppose that “The digital engineers work more like programmers–mostly text based ” refers to using some HDL for implementing the digital part of the SoC, just like we do with VHDL/Verilog for programming FPGAs (or prototyping ASICs).

    I haven't used HDLCoder, but I think combining that tool with, lets say, Altera's SOPC Builder/Quartus-II/NIOS-II or it's equivalent from Xilinx, could make a lot easier (and less time consuming) to implement a very efficient and complex real-time signal processing system in a FPGA.

  17. Scott Elder
    December 10, 2013

    @antedeluvian

    <>

    The question is: “How many times do you seek out the banister in the US vs. outside the US”?  🙂 

  18. etnapowers
    December 11, 2013

    @Scott: I agree on that, expecially in small companies where there is the need of an engineer who is specialized in a type of designing. For big companies the probability of finding one engineer that is quite expert in both analog and digital is higher due to the job rotation practise.

  19. etnapowers
    December 11, 2013

    @Victor: yes, according to me this is correct. The engineers should not only acquire knowledge of the SoC approach but also they have to develop the ability to decide what integrated solution fits better with the customer requirements: SoC, SiP, etc…

  20. Brad Albing
    December 11, 2013

    No, the question is, if the stairs apparently have no quality control, will the banister give way when I grab it.

  21. RedDerek
    December 31, 2013

    I do like your corollary to the banister.

Leave a Reply

This site uses Akismet to reduce spam. Learn how your comment data is processed.