EMC Basics #2: Resets as critical circuits

[Editor's note : we are pleased to continue our new series on the vital and sometimes unappreciated topic of electromagnetic compatibility (EMC), presented by well-known expert Daryl Gerke of Kimmel Gerke Associates. There is a link to Entry #1 at the end of this item.]

After clocks, we like to focus on reset circuits when doing an EMC board review. The reset circuits are often upset by transients such as ESD (electrostatic discharge) or EFT (electrical fast transient). A secondary threat is RFI (radio frequency interference.) The latter is not very common, but we have seen it happen at high RF levels. Fortunately, these problems are easy to prevent.

False reset effects can range from simple nuisances to a complete system lockup. The actual response is often dictated by the system software. As such, it can be easy to fix a reset problem at the software level. Alternately, one can often push the “reset” button or even power down to restart the system. In critical systems, however, this may not be an option so hardware fixes may still be needed.

The first thing we check is adequate power decoupling . This is particularly important when using a “voltage monitor/power-on reset” IC. Since these often use sensitive internal comparators, even a short disturbance on the Vcc can initiate an unwanted reset.

Incidentally, this was a serious problem with early reset ICs. Since then, the IC vendors have incorporated small internal delays (such as Schmidt triggering) with good success. Nevertheless, we still pay attention to decoupling to assure an extra margin of safety.

Next, we check the inputs . On simple devices, there may be none, as the IC relies solely on the Vcc rail. More sophisticated devices, however, may include a separate sense input or an external reset input. The latter is often connected to a button, with the input pulled high or low to initiate the reset. Both input types may need light filtering—a 1000 pF capacitor can work wonders.   

If the external reset goes off the board, additional filtering may be needed. Consider a ferrite in series with the button, followed by a 1000 pF capacitor at the IC input. Yes, this will slow down the system response to a reset, but if that is a problem, just push the button faster! After all, the typical delays are less than a microsecond.

The last thing to check are the outputs . If they run more than an inch or two, consider a RC filter at the IC output, plus 1000 pF capacitors at the loads. A better choice, if available, is to place the reset controller IC close to the device(s) it is controlling.

To recap, the typical hardware solutions for reset problems include decoupling of the Vcc, filtering of inputs (particularly if an external reset control is used), and filtering of outputs if the trace lengths are over an inch or two. Finally, do not overlook software fixes, a very cheap and very effective solution to reset problems.

Previous entries in the series

EMC Basics #1: Welcome!; and Clocks: critical circuits for EMC

About the author
Daryl Gerke , an EMI/EMC consultant since 1987, along with business partner Bill Kimmel, focuses on design and troubleshooting (not test and regulations). He and Kimmel have been chasing EMI problems for over 80 years (combined, of course.) He is a published author and columnist, and their EDN Designer's Guide to EMC (1994) is still in relevant and in demand. He can be reached via or his other blog at .

0 comments on “EMC Basics #2: Resets as critical circuits

Leave a Reply

This site uses Akismet to reduce spam. Learn how your comment data is processed.