Now we turn our attention to a real power supply to see for ourselves where all the buzz is really coming from. First consider what would happen if the input bulk capacitor of the power supply had been a perfect capacitor: i.e. with zero effective series resistance (ESR) (ignoring all other capacitor parasitics). Then any possible differential noise source inside the power supply would be completely bypassed by this capacitor. Clearly, the reason this does not happen is the non-zero ESR of the bulk cap.
So the ESR of the input capacitor is the major part of the impedance Zdm. The input capacitor(s), besides being refreshed by the operating current flowing in through the supply lines, also tries to provide the high frequency pulses of current demanded by the switcher. But whenever current passes through any resistance, such as the ESR, there must be a corresponding voltage drop. So we will see a high frequency voltage ripple across the terminals of the input capacitor. See Figure 1.
This voltage ripple shown in this figure becomes in effect the DM noise generator. It is essentially a voltage source. The current it succeeds in pushing and pulling through the L and N wires is the high frequency noise current Idm. Now, if we put a voltage divider across the noise source, the signal will be correspondingly reduced at the center node of the divider (the measurement end). That is the principle behind any DM filter.
However, we should take a closer look at Figure 1. The input line current IIN (bold arrows) flows through the diodes only for a brief moment during the AC cycle. That's when the diodes are forward biased. But during the time the diodes are OFF (highlighted in gray on each waveform), the high frequency switching current still continues to flow through the Fet. This drives VESR negative. So the high frequency ripple continues to be seen on the HVDC rail. But the surprise is that this noise appears on the cathode side of the supposedly reverse biased diode. This could only mean that the diodes somehow got momentarily forward biased to let the small pulses through.
We can look at it from another perspective. The bulk capacitor, because of its non-zero ESR is incapable of providing the entire high frequency content of the switching current. But the inductor, being essentially a current source, is literally not going to take 'no' for an answer. The current must come from somewhere, even if it means dragging the voltage on the anode the bridge rectifier diode momentarily low so as to extract current from that route too. Therefore, the DM noise generator is modeled as a voltage source during the times when the diodes are ON, but as a current source during the times when they are OFF. The two models switch back and forth at twice the line frequency. This could make it very hard to analyze. However, it has been seen that if a small X-cap is placed immediately to the left of the input bridge, then we can safely assume that the EMI spectrum is dominated by the voltage source, and we can thus ignore the current source model.
Also note that the in Figure 1 we have shown Idm as going into L and out of N. In the opposite half of the AC cycle, these directions will reverse. So the DM current direction sloshes back and forth depending on which part of the AC cycle we are on. Of course, from the point of view of the final EMI scan, this makes no difference, as several AC cycles will be looked at by the analyzer for making each measurement.
By definition, if there is CM noise, there must be some leakage path to Earth. But in power supplies this path is quite unlike what the signal integrity engineers may be talking about. For example, in many power supplies, we often use the enclosure to provide us with a fortuitous 'infinite heatsink' with which to cool our power devices. We need some electrical insulation, since the tab of the power device is usually the Drain of the Fet, and that point is usually swinging. An insulator for such a purpose, needs to be a poor electrical conductor, but a good thermal conductor so we can cool the device. But whenever we have two metal plates with an interposing dielectric, we also create a capacitance. From Maxwell's laws we know that if we vary the voltage across these plates, we create a magnetic field, and that is attributable to a current that starts flowing through the capacitor. In our case, that is the noise current into the Earth (or the common mode noise). It will follow the standard equation
Usually, we don't have much control over the dV/dt, and nor do we really want to reduce it too much in the interest of efficiency. So to reduce this current, we need to reduce C. but a closer look at the root equations reveals a dilemma. The thermal resistance (in?C/W) is given by
where A is the cross-sectional area of the insulator in m2 (i.e. the interface area between the device and the heatsink), d is the thickness of the insulator (the dielectric) in m, and ? is the thermal conductivity of the insulating material W/m-?C. The capacitance (in F) given by
where K is the dielectric constant of the insulator, and ?O is the permittivity of free space (8.854 ? 10^-12 F/m). Note that K is dimensionless, being the ratio of the permittivity of the insulating material to the permittivity of air (free space) i.e. K=?/?O. It is also called the relative permittivity, ?r.
Combining the two equations, get
We have plotted the above equation in Figure 2 (for ? close to unity). We note that
The curves are independent of A or d.
If we try to improve Rth (the thermal resistance) we increase the capacitance. That would clearly increase the noise current.
The problem is that for a given K, Rth is inversely proportional to C.
Note that on the left side the vertical axis is plotted on log scale, but C itself is (linear) in pf. On the right side we have used a linear scale, but C is in dBpF (i.e. 20?log(C/1pF)). Which makes the two vertical axes basically the same. However, since every Fourier harmonic component of the resultant noise is proportional to C, the right side scale truly represents the change in the CM emissions (expressed in dB) as we vary the thermal resistance. Our key observation thus is
If we halve the parasitic capacitance, that will give us roughly a 6 dB improvement in EMI because CM emissions would vary according to 20log(ratio of C), so 20?log(2)?6 dB. However, we can see from the curve that that this is also accompanied by a doubling of the thermal resistance of the interface. So if we previously had a 10?C difference from case to heatsink, we would now have 20?C. And every 10?C rise of temperature is said to double the failure rate of the component. That adds up to a huge warranty repair/replacement cost to the system manufacturer. Do we really want to do that?
The capacitance that can be created in a power supply by the insulator is presented in Table 1. Here we have compared traditional insulator material, mica, with a modern choice, silicone rubber.
Note: Mica is a natural mined mineral (mainly from India), and was once a popular general-purpose insulator. Besides being cheap, it is a very good thermal conductor, and a very poor electrical conductor. Therefore, it was the insulator of choice for many years for mounting power semiconductors on heatsinks. It is still very popular in very high-voltage applications, but in power supplies, it fell from favor mainly because of production issues particularly revolving around the thermal grease that was always required with it. One concern was that thermal grease can evaporate slowly over time (at high temperatures) and this causes a worsening of the thermal contact. On the other hand modern materials like silicone rubber started emerging, which had an ability to conform to fairly imperfectly flat surfaces. They thus require no grease, and the thermal resistance actually falls with time with these insulators.
From the table we can see that mica creates more parasitic capacitance despite a lower K, and that is clearly attributable to the smaller thickness that is typically used. The same happens when we use some of the modern, expensive, and yet popular polyimide (NOT polyamide!) insulators which are excellent thermal conductors, but are also very thin. They can be recognized by their typically amber color, and come in various brand names like Kapton, Kinel, Upilex, Upimol, Vespel etc. So should we just put in another layer of insulator to solve our EMI problem? How much thickness of insulator do we really need?
The criterion to select a given thickness of insulator is normally based on maximizing thermal performance (as thin as possible) while still complying with any applicable safety requirements like the required voltage withstand capability. European safety norms require basic or supplementary insulation be rated at least 1500VAC, whereas double or reinforced insulation must be rated over 3000VAC. So for example, a mica sheet of 0.06 mm thickness is typically rated 1000VAC, whereas 0.1 mm thick mica is typically rated 1500VAC (or 2000VAC). Therefore 0.06 mm thick mica cannot usually be used except as functional isolation. It can be used in low voltage DC-DC converters, or even in off-line applications where the heatsink is not connected to the chassis/Earth.
If the line voltage is always less than 130VAC, as for equipment only intended for use in the US, the mandatory dielectric withstand requirement for basic insulation is only 1000VAC and therefore 0.06 mm mica can be used as basic insulation (with Earthing providing the second level of protection). For general acceptability all across Europe, we may always need to place reinforced insulation (rated 3000VAC) from primary side to Earth irrespective of Earthing (since lack of Earthing doesn't count as a fault condition in many regions). In our case, that means two layers of 0.1mm mica are always required when mounting primary side power devices on to the chassis.
Note: It must be pointed out that some high-end power supply designs (military grade) use ceramic insulators (e.g. beryllium oxide or aluminum oxide, also called alumina). These offer very high thermal conductivities about 30-50 times better than mica (which has ?=0.7 W/m-?C) and can therefore be much thicker (they also need to, because they are brittle). We note that beryllium oxide has toxic properties and not suited for a typical commercial production environment. Use of these ceramic materials can significantly reduce the capacitive noise. There is also an interesting rule called the '45? rule' (degrees of angle not temperature) which has been used successfully by designers of such converters. This 'rule' indicates that you actually decrease the thermal resistance by using larger thicknesses of insulator, basically because more and more of the cross-sectional area of the insulator gets utilized as thickness increases. Note however that like mica, thermal grease is required with these materials too because of their inherently poor surface finish.
Tip: If we want to know how much thermal resistance is typically attributable to thermal grease, we must remember that without this grease we would have air in the spaces between the device and heatsink, and that is a very poor thermal conductor. Thermal grease lowers this interface resistance significantly by filling the spaces, but it does not establish zero thermal resistance either. We can usually model thermal grease as leaving behind about 0.2 ?C/W of resistance for each square inch of area of contact. The thickness of the layer of grease is not significant, only its area of contact. Knowing the total thermal resistance accurately should help in making a better choice of the insulator and trading some thermal resistance off if necessary for lowering the capacitive coupling.
Now we need to understand the physics behind common mode noise generation. We will now see why the explanations usually given out (by signal integrity engineers and some rather confused power supply designers) do not really apply to power supplies. Let his first list two main reasons why this comes as no surprise
1. In power supplies the main leakage path to Earth is not resistive, but capacitive. We also know that in steady state the average current through a capacitor must be zero. So there is no way a constant leakage current can keep flowing into the Earth. It must be going back and forth so as to keep the average voltage across the parasitic capacitance constant.
2. The parasitic capacitance is not connected symmetrically to the two input DC rails. So why should the ground leakage current be shared equally?
Now let us look at Figure 3 to see the path the common mode current must actually be taking. We can see the actual path the noise current Icm takes (bold arrows). Note that there are also stray paths (dotted arrows) through which a part of Icm may flow.
We are ignoring the common mode currents that are injected through the parasitic capacitance inside the transformer. Let us also ignore for now, the components marked 'Y-CAP' on the schematic. Then the relevant observations are
The first of the two schematics shows what happens at the moment the Fet is turning OFF. The voltage on the Drain suddenly goes high. If the voltage across a capacitor changes suddenly, it injects a current through the capacitor given by I=CdV/dt. This current passes into the chassis/Earth, and the capacitor acquires a small charge in the process.
The lower schematic shows what happens at the moment when the Fet turns ON. Now the Drain of the Fet goes low. The parasitic capacitance now has to give up all the charge it acquired in the previous step. The Fet therefore turns ON and discharges this capacitance as indicated.
There is more to this actually. We must consider where the charging current comes from. Basically, whenever we command the Fet switch in any power converter to turn OFF, the inductor does not allow the current in the Fet change — until a freewheeling path is available. The freewheeling path is provided by the 'catch' diode. But for this diode to become 'available' (conduct) it must get forward biased. Which means that the voltage across the Fet has to rise fully, before the current through it even starts to diminish. For the Fet voltage to rise, all the parasitic and non-parasitic capacitances preventing it from rising, demand that be charged up. One of these capacitors is across the Drain and Source (the COSS). Another, in this case is the parasitic capacitance to Earth. Therefore it is the inductor current that is responsible for pushing charging current through these stray capacitances. This is the reason why in a power supply, the so-called CM generator is said to behave as a current source.
Now, the Drain to Source capacitance had to get charged up for the diode to start freewheeling, because its opposite end is firmly connected to a fixed voltage rail (the primary side ground). However, in principle, the parasitic capacitance to Earth need not get charged up at all for freewheeling to occur. In fact, we can 'enforce' zero current flow through this parasitic capacitance by simply breaking the galvanic connection it has to the Earth wire coming from the wall outlet (assume no filter stage is present). As expected, this has no effect on the switching process. But what we have done in the process is allowed the enclosure to 'float'. How could this happen? The leakage current I through the parasitic capacitor is related to the dV/dt across the parasitic capacitor by the equation I=CdV/dt. If I is made zero, we must have somehow made dV/dt zero too. But on one side of the capacitor we have a fixed dV/dt created by the switching of the Fet. So the only way I could be zero is if the dV/dt on both sides of the capacitor is exactly the same. Then the net dV/dt across the capacitor is effectively zero, and so is the current passing through it. What this means is that if we don't have a galvanic connection to the Earth wire, the enclosure will develop a dV/dt exactly equal to that present on the Drain of the Fet, and it will therefore start radiating. So we may again have finally succeeded in improving the conducted emissions, but we are surely stuck with a radiation problem.
Therefore what we really want to do is to provide an easy path for the CM current to flow. By doing this, we prevent a dV/dt build-up on the chassis. This will hold the chassis at a fixed potential and prevent radiation. For common mode noise, we must therefore actually ensure that all the galvanic connections to Earth are good, and that any intervening traces are wide, and of low inductance.
Having allowed the Icm to flow, how do we stop it? We need to at least stop it from flowing into the wiring, and also from creating fields of its own. Our first interest is to minimize its loop area, so as to prevent it from becoming a good H-field antenna. This will also circumvent some of this noise away from the mains wiring, since current will always prefer the path of least impedance. We now see the role played by the two additional Y-caps marked 'Y-CAP' in Figure 3 (connected between the rectified DC input rails and Earth). One or the other, or both of these caps, are commonly seen in practical power supplies, and they always help in providing several valuable decibels of additional EMI suppression. They work by providing a shorter path for the common mode current to be returned. But they must be placed very close to Fet and with low inductance connections.
Since these additional Y-caps don't pass any AC line frequency leakage current into the Earth, they are not subject to safety considerations regarding ground leakage currents. Therefore we can make them quite large. However, we can't ignore what their voltage rating has to be as per safety regulations. In this position, we usually need two Y2 caps in series (or a single Y1 cap).
We can see that the CM noise in power supplies tends to be nonsymmetric. However, the X-cap and Y-caps just before the diode bridge, help in distributing this noise almost equally between the L and N lines. And that is important if we want the common mode filter to work as envisaged. Otherwise, we will find that it isn't working as well as we expected, and if we didn't know better we could be needlessly trying to increase the size of the CM choke.
A corollary: many seasoned engineers are extremely nervous about chassis mounting of power devices. Often they can be coaxed into mounting the output diodes in this manner, but not the high-voltage Fet. Actually, if the Y-caps shown in Figure 3 (marked 'Y-CAP') are provided for, and they return the injected noise back very close to the Fet, there is really no problem. To help in this purpose, a metal standoff from the enclosure to the PCB should be positioned very close to where the Fet is mounted, and the Y-caps can then connect there. See Figure 4.
CM noise suppression is usually said to require a very 'good' connection to Earth. So the Earth traces are supposed to be very thick and straight along the PCB, with several metal standoffs to establish good electrical connection from the PCB to the chassis. If the connection is made near the AC inlet, and with wires which are not of low inductance, the enclosure can start radiating as indicated in Figure 5. It is important to let the CM noise current flow through a low impedance path, and then to suppress it in the filter stages.
We can visualize that board-mounted IEC inlets will work much better because of the more direct connection they can provide to help return the CM noise back to its source.
We could of course not connect the heatsink to the chassis, We would lose a great deal of thermal advantage, but our CM noise will probably be less. The reason that even this doesn't seem to work well sometimes, is that the engineer forgets that for this solution to work, the entire loop of trace shown in Figure 6 needs to be thick and short. That is likely to be rather long anyway, considering the logistics of the board layout with all the other components that need to be present, especially in an off-line power supply. Copper traces can't provide a very low inductance if they are long. We must remember that halving the length of any trace does halve its inductance but we can't fully compensate for a long trace by making it thick or wide. In fact we have to increase the width of a trace by a factor of 8-10 to halve its inductance. The reason is the self-inductance, which makes the dependence on width logarithmic rather than linear. The empirical relationship for the inductance of a PCB trace is
where l and d are the length and width of the trace respectively (in cm). In CM noise we can have very high frequency Fourier components, and even a few nH will present a large impedance. So what will happen due to poor high frequency connectivity, is that the internal heatsink will start radiating. This will couple inductively to the chassis/input/output cables, and they would start radiating and conducting too. So we would be back, right where we started.
Some engineers try to get the best of both worlds by mounting the device on the enclosure, but by using special insulators which come with a built-in 'Faraday shield'. This is just a thin metal layer sandwiched between layers of insulator. It is supposed to be connected on the PCB to primary ground, and thereby it 'collects' the injected noise and returns it, without letting it pass into the enclosure. However because of safety requirements, such composite insulators are usually very thick, and their thermal resistance is rather unacceptably high.
A 'ground choke' should be avoided at all costs. Think of what it can do if we put this in, in Figure 5. See the discussion below.
Q&A: Is it a good idea to place a small inductor (e.g. a bead or small toroid with a few turns) somewhere in the Earth connection? Like say on the wire connecting the AC inlet to the enclosure?
This is called a 'ground choke' or 'Earth choke'. This is commonly seen on evaluation boards brandished by some high-voltage switcher IC vendors, but rarely seen on a commercial power supply. And for good reason.
We first note that the idea of such a choke seems to be at odds with our previous suggestion of a good high frequency connection to Earth. When we place the ground choke, we are basically trying to prevent conducted CM noise from flowing into the mains wiring, but in return, we may have a radiation problem. Besides, there are industry documented problems where the ground choke has caused severe system problems. For example if a power supply is turned on at the peak of the input AC waveform, it produces a very high initial surge of charging current through the Y-caps. If there is a ground choke present it causes the voltage on the Earth traces and the enclosure to be locally 'bumped up'. Now in most cases, the return of the output rails of the power supply is also connected directly to the enclosure, and forms the ground plane for the entire system.
The system also would typically connect to the chassis/enclosure at several points downstream. This surge-induced bump near the area of the power supply then causes severe imbalances across the system ground plane, leading to data upsets and even destruction of the subsystems. A similar situation will arise during ESD testing and conducted immunity testing, in which surge voltages are applied from Line to Line, or from Line to Earth. So however tempting it may seem to the power supply designer who is focused only in solving his conducted mode EMI problem (and going home), a ground choke should be avoided at all costs. Some high voltage semiconductor companies who are only making open-frame (enclosure-less/standalone) evaluation boards ('design aid kits') to showcase their high voltage switcher/controller, the ground choke suits them fine from a marketing viewpoint. They know that being open-frame anyway, no one expects them to comply with any radiation limits. So they quietly push the problem they have seen on their conducted emissions plot (which they need to be able to spruce up and show to customers) towards a future radiation emissions saga (which only the hapless system designer will have to discover, and then live and die for).
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To my wife Disha and daughter Aartika for tremendous patience while I frittered away what was to be quality family time on this. And also to Mike He and Dr GT Murthy for a lot of encouragement along the way.