ESD has been around for a long time – probably since shortly after the Big Bang. For most of human existence, it's made itself known by macro effects such as static cling and mildly shocking encounters with metal objects. Since the advent of semiconductors, though, protecting electronic devices against ESD damage has been a prime goal of manufacturers; failure to do so can have catastrophic consequences.
ESD damage can occur due to excessive voltage, high current levels, or a combination of both. High voltages can cause gate oxide punch-through, while excessive I2 R levels can cause junction failures and metallization traces to melt. As manufacturing geometries continue to shrink – Intel's Haswell uses a 22nm process – the voltage and current levels that can cause ESD-related failures also decrease. This has made it difficult to provide even relatively low levels of on-chip ESD protection; the emphasis has therefore shifted to separate ESD protection devices.
Changing application environment poses problems
The proliferation of laptops, cell phones, MP3 players, digital cameras, and other hand-held mobile devices poses particular problems for high-speed high-speed differential interfaces such as USB 3.1, HDMI 2.0, DisplayPort, and others. In these uncontrolled environments, owners frequently touch I/O connector pins while connecting and disconnecting cables; devices are subjected to constant ESD stress as users plug cameras, games, and other devices into their USB and video ports.
Protocol Data Rate (Gb/s) PCIe 3.0 7.877 SATA 3.1 1.5, 3.0. 6.0 DisplayPort 1.2a Source 1.62, 2.7, 5.4 USB 3.1 10.0 SGMII 1.25 HDMI 2.0 6 Table 1: Some common high-speed serial interfaces
IEC 61000-4-2, the industry standard for system level ESD testing, aims to replicate a charged person discharging to a system in an end-user environment. The purpose of the system level test is to ensure that finished products can survive normal operation and it is generally assumed that the user will not take any ESD precautions when using the product. The electrostatic discharges that result can reach up to 16A in 30 ns (IEC 61000-4-2 Level 4, 8kV contact discharge).
ESD protection technology
In a high-speed serial interface, it's not enough for the ESD protection device to simply clamp ESD pulses: it must do so without compromising the signal integrity of the high-speed link.
As speeds increase, it's vital for the interface to maintain impedance matching throughout the signal path. Any impedance mismatch will cause reflections on the line which will increase jitter and potentially compromise signal quality, so high-speed serial interfaces require stringent capacitance limits for any external components in the signal path.
Adding required ESD protection also adds undesired additional capacitance. With traditional ESD device architectures, as protection levels increase, so does device capacitance, forcing designers to choose between signal integrity and ESD protection. Semiconductor diodes have many desirable characteristics, such as low clamping voltages, fast turn-on time, and better reliability, but up until recently have had higher capacitance than other architectures.
Recently manufacturers have introduced diode-based protection devices with very low capacitance specifically for high-speed applications. The PUSB3FR4 from NXP, for example, is designed to protect high-speed interfaces such as SuperSpeed USB 3.1 at 10 Gbps. The device includes four high-level ESD protection diode structures and is encapsulated in a leadless small DFN2510A-10 (SOT1176-1) plastic package.
All signal lines are protected by a special diode configuration offering line capacitance of 0.29 pF. The diodes utilize a snap-back structure in order to provide protection to downstream components from ESD voltages up to +/-15 kV contact, exceeding IEC 61000-4-2 level 4.
The similar PUSB3FR6, with six ESD devices, offers system-level protection for the interface combination of USB 2.0 and USB 3.1, which is a feature of the new USB Type C connector.
Figure 1: ESD7008 clamping response to IEC61000-4-2 +/-8kV contact ESD pulse (source: ON Semi)
ON Semiconductor is also active in this market: its ESD7008offers ESD protection for 4 differential pairs (8 lines) in an UDFN18 package and features 0.12pF typical capacitance to ground.
Many parasitic elements on the PCB may degrade the overall ESD performance of a system, so it's necessary to optimize the placement of ESD protection devices and the PCB layout to achieve the best ESD performance.
Here are a few recommendations:
- Parasitic inductance must be reduced as much as possible by shortening the ground path return to the GND vias.
- A symmetrical layout also reduces parasitic inductance. It is important to connect the connector on one side of the ESD device and the transceiver on the other side.
- To avoid ESD propagation on the PCB, the ESD protection device must be placed as close as possible to the ESD source.
- As ESD stress can be propagated on both sides of the interface cable, a protection device on each end of the cable is required.
ESD protection devices intended for high-speed use flow-through packages to facilitate correct layout practices. Figure 2 shows the pin out arrangement for ST's HSP061-4NY8, which provides 4-line ESD protection for HDMI, USB 3 and similar interfaces. The I/O capacitance is 0.6pF to ground, and the differential impedance is 100 Ω typical under HDMI specifications.
Figure 2: HSP061-4NY8 pin out and flow-through package (Source: ST)
Similarly, the flow−through style package on ON's ESD7008 allows for easy PCB layout and matched trace lengths necessary to maintain consistent impedance.
Many other manufacturers also offer ESD protection devices for high-speed use that are designed to meet the IEC612004-4-2 standards.