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Extracting Loop Gain and Phase Information from Simulation

How Stable is your Op Amp or FDA design?

One of the most important aspects of any end system design is to understand and improve (if necessary) the nominal phase margin for each stage. Since the early days of op amp development, analyzing the Loop Gain (LG) for Phase Margin (PM) at LG=0dB crossover has been a fundamental part of the designer toolkit (Reference 1).

Tracing the small signal response through the device’s open loop response and then back through the feedback network to where the error signal is formed at the input will give the LG around the loop where the critical assessment is how much phase shift has occurred around the loop at the frequency where the total LG=1V/V (or 0dB). If that phase shift is at or greater than 180deg, then the loop is unstable. Normally, designs should not ship with greater than 150deg phase shift around the loop, or <30deg phase margin. One new aspect to this analysis is the highly reactive open loop output impedance for today’s Rail-to-Rail (RR) output designs. Early op amps had low open loop output impedance whereas many recent RR devices show a strongly frequency dependent output impedance. This open loop output impedance divides against the load in parallel with the feedback impedance to introduce additional attenuation and phase shift into the loop. Even relatively simple circuits like Figure 1 can get into phase margin trouble due to this effect. This simulation is using TINA (Reference 2) to execute a wide frequency range closed loop small signal response.

Figure 1

Gain of 3 with 850kHz feedback pole and simple differential 500Ω load.

Gain of 3 with 850kHz feedback pole and simple differential 500Ω load.

This single-ended input to differential output FDA circuit is using a very low power, wideband, voltage feedback THS4551 (Reference 3) device. While the desired 850kHz low pass pole is being produced by the feedback capacitors, looking further out in frequency shows a disturbing resonance at 165MHz. This circuit is in fact oscillating due to the highly reactive open loop output impedance of Figure 2 interacting with the feedback impedance and due to those feedback capacitors reducing the noise gain (1/β) to 1V/V at higher frequencies. To see the results of Figure 1, it is imperative that the correct open loop gain and phase response along with the open loop output impedance be incorporated into the vendor model – as it was for the THS4551.

Figure 2

THS4551 open loop differential output impedance (Figure 68 in Reference 3 data sheet link below).

THS4551 open loop differential output impedance (Figure 68 in Reference 3 data sheet link below).

Setting up for a Loop Gain simulation.

Any open loop simulation needs to first establish a DC operating point for the device that is usually midscale on the power supplies. One common approach is to add a DC level to the input AC signal that exactly centers the device output voltage where a small signal AC simulation can then be run. While possible, finding that exact voltage to counteract the device DC offsets can be a tedious affair. A faster approach uses extreme L and C values to first establish a centered DC operating point then provides a step impedance shift for the AC simulation. There are several places to break the loop for this simulation where the preferred “input” break point is shown in Figure 3. Several added elements are circled in Figure 3 that aid in setting up and running this simulation. Simulation setup comments:

  1. The power supplies are split on +/-2.5V where the output common mode control (Vocm ) for this FDA type device is set midscale at ground.
  2. The 9.97kH feedback inductors provide a short at DC then immediately open up on the first small signal AC frequency step point. This DC short ensures the FDA I/O pins all operate at DC ground from the output Vocm control loop.
  3. The 9.97kF input capacitor injects the small signal AC stimulus while opening up at DC to allow the feedback inductor to set the DC operating point.

The simulation operates to inject a differential small signal stimulus at Vinn and Vinp which then gets gained up by the FDA open loop gain (Figures 66 and 67 in the data sheet of Reference 3), attenuated and phase shifted by the open loop output impedance into the total load seen by the output, then divided down and phase shifted back to the differential measurement points at Voutn and Voutp. This stimulus and measurement is exactly the Loop Gain needed for a phase margin assessment as shown in Figure 3. There, the LG magnitude is plotted on top where the 0dB crossover is located at 170Mhz. Then the lower phase curve is probed at the same frequency to show an excessive -185deg phase shift around the loop.

Figure 3

Loop Gain simulation for the circuit of Figure 1 with the loop broken at the input nodes.

Loop Gain simulation for the circuit of Figure 1 with the loop broken at the input nodes.

The circled elements are required (or help) DC operating point convergence or simulation issues.

  1. The differential stimulus needs a DC path (10MΩ) to ground as they only connect into a DC isolated point.
  2. The 100Ω in series with the inductors help DC convergence and reduces “numerical chatter” in the AC simulation.
  3. Similarly, the odd values on the L and C along with the small 0.2Ω output R’s reduce “numerical chatter”. Without this approach, more complicated models like the THS4551 often show a “noisy” AC simulation.
  4. Most importantly, whenever a loop is broken like this to see the LG, impedances that are now inside the isolating LC, but would normally be part of an actual loop gain response, need to be brought outside the LC isolation and placed manually where they would normally appear. Breaking the loop at the input nodes only requires the specified differential input impedance to be added manually across the Loop Gain measurement points (normally the summing junctions in a closed loop sim) as shown in Figure 3.

The Loop Gain simulation of Figure 3 is in fact showing 185degrees around the loop at LG=0dB at 170Mhz – very near the closed loop response peaking of Figure 1. This LG simulation has confirmed the simple circuit of Figure 1 is in fact unstable. One added useful result out of Figure 2 would be to report the loaded open loop gain and phase for the THS4551 model by placing a differential meter across the 500Ω load resistor.

Alternate approaches to LG simulation

Some sources suggest a similar approach to Figure 3 but with the loop broken at the output(s). An example using the same circuit of Figure 1 is shown in Figure 4. Here, the loop is broken by the inductors at the output pins and a signal injected into the feedback network developing a path through the feedback dividers then forward through the amplifier’s open loop gain and phase being measured at the device output pins.

Figure 4

LG simulation with the loop broken at the output pins.

LG simulation with the loop broken at the output pins.

This simulation is also showing a phase margin problem but at 207Mhz LG=0dB crossover – not matching the resonance of Figure 1. Breaking the loop as shown in Figure 5 is not including the effect of the open loop output impedance combined with the feedback load – it does see the 500Ω load, but for simulation accuracy, the feedback load should also be included. Where the device has a low open loop output impedance, or the load is dominant over the feedback impedance, this approach can work well. Note the approach of Figure 4 directly includes the differential input impedance internal to the THS4551 model (Reference 4) – so that is not split out separately.

To make this approach more accurate, placing the inductor directly at the outputs and then adding a model for the open loop output impedance driving both the load and feedback impedance would be required. That would then require an RLC model for the impedance of Figure 2 (Reference 5). While those RLC elements are included in the THS4551 TINA (Reference 4) model, no explicit listing of that appears in the data sheet. The differential input impedance is detailed in the input specifications for the THS4551 – easing the LG simulation task using the approach of Figure 3.

Conclusions:

Assessing phase margin in modern high-performance op amp’s and FDA’s can be easily accomplished using the technique shown here. This is a critical step in the design review process where reliably producing this simulation is 1/2 the battle. The vendor models do need to include all the requisite elements to be accurate. The new RR output stages introduce more phase margin problems in simple circuits than might be anticipated. Quickly assessing that will ease the resolution process. Going on to the next step of resolving the phase margin problem in the circuit of Figure 1 will be taken up in a subsequent discussion.

References for Loop Gain Simulation article.

  1. Feedback Plots Define Op Amp AC Performance” Burr-Brown Application Note, Jerald Graeme, 1989
  2. TINA simulator available from DesignSoft for <$350 for the Basic Plus edition. Includes a wide range of vendor op amps and is the standard platform for TI op amp models.
  3. TI, THS4551 , “Low Noise, Precision, 150-MHz, Fully Differential Amplifier”,
  4. TI, THS4551 TINA simulation model
  5. Modeling the output impedance of an op amp for stability analysis”, TI Analog Applications Journal, 3Q2016, Collin Wells, Miro Oljaca

7 comments on “Extracting Loop Gain and Phase Information from Simulation

  1. Man21
    August 17, 2018

    Paul Tuinenga in his book SPICE: A guide to Circuit Simulation and Analysis Using PSpice (section 6.9, p59, Plotting Loop Gain, in my 1998 edition) develops a technique for determining loop gain in a closed-loop circuit without having to break or alter the circuit. It would be interesting to see if that approach produced similar results to those in the present  article. It may be noted that my version of Tuinenga's analysis results in a small difference in his final equationon for T on p63 with -2 rather than +2 in the denominator.

  2. Tucson_Mike
    August 21, 2018

    Thanks Man21, I vaguely recall this technique and it is probably quite valid as well. There are usually multiple ways to tackle these issues. I could not find a description of what he was doing there, but I suspect he is just solving backwards for the LG inside the full transfer function. So if you have gain phase info closed loop you should be able to dump that data out into some code that will solve for the loop gain. That would be more steps, while the solution we actually use shown in the article is pretty quick and should give the same results. I may buy that book though, seems like a good addition to my library – thanks. 

  3. Tucson_Mike
    January 2, 2019

    Hello Man21 again, I did get that book and indeed Paul shows that “Middlebrook” based approach as a LG sim approach. It is pretty terse and I could not make much out of it – fortunately, Dr. Sergio Franco just posted a great discussion of this on EDN comparing a breaking the loop approach (called Rosenstark's – news to me?). Apparently, what we have been doing is an approach attributed to Rosenstark where we take advantage of the dominant 1/T term to only do one simulation. Can't attach that article link but it is on EDN posted Dec. 26. I have been working through the much more useful and detailed steps shown there for the middlebrook approach (inserts a test voltage and then a test current at a node without breaking the loop) and indeed that equation you questioned in Paul's Spice book is in fact correct – pretty odd looking and not computationally obvious – going off to see if I can replicate this approach with my vast range of CFA models (will use the OPA683 in this case, it is a transistor based model – most accurate). I am hopefull I can get that two pass approach (Middlebrook) to match my simpler break the loop with one pass results – here's hoping!!

  4. Man21
    January 3, 2019

    Dear TucsonMike,

    Glad to hear the reference to Tuinenga's book was of use. I also found his analysis of the Mddlebrook technique rather compact so decided to work through it myself. You can find the analysis in my book ISBN13 978-0-521-68780-5, section 5.14 if it is of interest. I have found the link to the Franco article and got a copy.

    Regards Scott.

  5. Tucson_Mike
    January 3, 2019

    yes Scott, I found your book on Amazon as well, will need to get that ordered the next time I can bundle a few more things into an Amazon order. I have run the OPA683 gain of -1V/V using Rf=Rg closed loop (55deg phase margin from peaking) in TINA,  and then a single pass, break the loop at the input, LG sim with the inverting input Z model as an LR I extracted from simulating the TINA model. It matches perfectly at 55deg phase margin. I do have the model running with the two pass Middlebrook approach, but have not yet worked through how to massage that sweep through Eq. 8 in this recent Sergio article. Incidently, if your book changes that denominator to a -2 instead of +2, as near as I can tell stepping through Sergio's material – it should be the +2 that shows up in all lit I have found. 

  6. Tucson_Mike
    January 23, 2019

    Hello Scott, I did order your book “An Analog Electronics Companion” from 2000 and it finally arrived. Lots of good stuff from the quick scan I made this AM. Couple of quick comments – 

    1. Your 5.13 3rd order low pass SKF takes on this stage in a classic sense I suspect.I am sure you are aware, but just in case, the most thorough modern treatment I have seen recently (Dec. 2018) showed up on EDN by Chris Paul.

    2. The Middlebrook method in section 5.14 – I will have to keep plugging on that one. But I will say in the op amp apps teams we never used it. Some high level comments. 

    a. There seems some comments that it allows an approach to bench LG measurements – not really at higher speeds, too many calibraiton issues – especially phase. You can't inject/sense signals inside the loop cleanly at higher speeds. 

    b. I think the Middlebrook approach did get pulled into Cadence as a built in tool which is very powerful. 

    c. Everything I have read indicates if the impedances are widely different looking each way at the injection point, only a single sim is pretty accurate. In essence, I think that is what we are doing breaking the loop and only injecting an error signal and tracing it around the loop. 

    I did find a pertinent discussion in the TI E2E archives where a customer sent in a TINA file set up for a Middlebrook test. That gives me a good starting point – ideally, if I can wrangle that sim to a result then repeat with the approach I have been using, hopefully will match up – though the discussion there was not encouraging.

    https://e2e.ti.com/support/amplifiers/f/14/t/395136?OPA171-the-improvement-of-phase-margin-and-gain-margin

     

  7. Tucson_Mike
    January 23, 2019

    Hello Scott, I did order your book “An Analog Electronics Companion” from 2000 and it finally arrived. Lots of good stuff from the quick scan I made this AM. Couple of quick comments – 

    1. Your 5.13 3rd order low pass SKF takes on this stage in a classic sense I suspect.I am sure you are aware, but just in case, the most thorough modern treatment I have seen recently (Dec. 2018) showed up on EDN by Chris Paul.

    2. The Middlebrook method in section 5.14 – I will have to keep plugging on that one. But I will say in the op amp apps teams we never used it. Some high level comments. 

    a. There seems some comments that it allows an approach to bench LG measurements – not really at higher speeds, too many calibraiton issues – especially phase. You can't inject/sense signals inside the loop cleanly at higher speeds. 

    b. I think the Middlebrook approach did get pulled into Cadence as a built in tool which is very powerful. 

    c. Everything I have read indicates if the impedances are widely different looking each way at the injection point, only a single sim is pretty accurate. In essence, I think that is what we are doing breaking the loop and only injecting an error signal and tracing it around the loop. 

    I did find a pertinent discussion in the TI E2E archives where a customer sent in a TINA file set up for a Middlebrook test. That gives me a good starting point – ideally, if I can wrangle that sim to a result then repeat with the approach I have been using, hopefully will match up – though the discussion there was not encouraging.

    https://e2e.ti.com/support/amplifiers/f/14/t/395136?OPA171-the-improvement-of-phase-margin-and-gain-margin

     

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