The previous blogs of this series describe the possible failures in aerospace applications due to the action of the ionizing radiation creating couples (electron/hole ) inside the silicon material:
- SEL (Single Event Latch-up) (Described in the Part 2 of this blog )
- SEU (Single Event Upset) (Described in the Part 3 of this blog )
- SET (Single Event Transient) (Described in the Part 4 of this blog )
- SEB (Single Event Burn-out) (Described in the Part 4 of this blog )
- SEFI (Single Event Functional Interrupt) (Described in the Part 4 of this blog )
This blog describes the last failure type:
- SEGR (Single Event Gate Rupture)
This failure is destructive, and that consideration underlines the importance of preventing this failure because, in case of SEGR , the functionality of all the aerospace application board would be irremediably affected.
When a heavy ion (or a proton) crosses a CMOS structure, it generates e– /p+ pairs. If an electrical field is applied, some additional electrical charge will accumulate on both sides of the gate oxide. These trapped charges increase the potential difference across the gate oxide. When the voltage difference is too high, the gate oxide becomes broken (see figure 1).
(Source: ESA)
The SEGR failure may occur in all the structures presenting an oxide structure. Hence some elementary components that are utilized in power conversion modules for aerospace, for example power MOSFETs or IGBTs, might be impacted by SEGR . The IC devices most impacted by SEGR are power MOSFETs, non-volatile NMOS structures, VLSIs, and linear devices.
The designer of these ICs has to take into consideration this risk. A good method to perform an effective design is a laser beam simulation. A laser beam is a beam of photons having enough energy to generate e– /p+ pairs. The laser beam simulation reproduces effectively the effects generated by a heavy ion or by a proton that crosses the silicon-based structure.
The SEGR is many times strictly correlated to the PIGS (Post Irradiation Gate Stress), which might occur after irradiation during the testing process of a gate oxide as it may present a breakdown.
The trapped charges due to radiation presence can cause an overvoltage stress during the post irradiation testing process. Hence the testing might disrupt the device because a high voltage appears across the oxide. The PIGS is not a single effect. It consists in an electrical stress, for example of the gate oxide of a power MOSFET, after irradiation, by applying a reverse-bias gate-source voltage, VGS , to the gate oxide, which may show a breakdown.
The typical test presenting a PIGS is the ISGS test of a radiation hard power MOSFET (see figure 2).
Did you ever experience a failure for SEGR or PIGS? Do you think there is an effective method to test the robustness of an IC to SEGR or PIGS before the irradiation?
SEGR failure appears when an electric field is applied, the electric field can be created during the normal functioning of the device or it could be due to an impacting electromagnetic wave, so the module might fail even if it's switched off.
Among the most impacted devices by a SEGR failure there are the linear devices and the non volatile NMOS structures, this might be a big issue to face in the aerospace environment, because these types of devices are very common in IC structures.
The laser beam simulation could be very useful for the designer of devices for all the applications requiring the presence of electromagnetic waves, for example photonics on silicon applications.
This is something which is completely out of the topic but it relates to the technology so thought of asking it. Can this technology be linked for the RFID improvements?
The SEGR and PIGS effect may appear each time a silicon oxide is impacted by particles having a considerable mass, so it is not exclusively a failure that appears in the aerospace environment.
I think that the catastrophic failure mode caused by single-event gate rupture phenomenon observed in power MOSFETs still remains a critical issue for devices to be used in space radiation environments. In SEB, an ion that transverse the transistor structure through the source can induce current flow that turns on the parasitic npn transistor below the source leading to forward-biased second breakdown. I think this will lead to device destruction, if any case there is sufficient short circuit energy.