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Guidelines for supplying power to high-speed ADCs

Most of today’s high-speed ADCs have at least two supply domains: an analog supply (AVDD) and a digital and output-driver supply (DRVDD). Some converters have an additional analog supply which typically should be treated like an extra AVDD supply. 

The analog and digital supplies on a converter are separated in order to prevent the digital switching noise (particularly the noise generated from the output drivers) from interfering with the sampling and processing of the analog sample on the analog side of the part. Depending on the signal being sampled this digital output switching noise can have significant frequency content and can easily degrade both noise and spurious performance if this noise is allowed back into the analog or clock inputs of the part or into the analog side of the chip through the power supplies. 

In order to get maximum performance from a high speed analog-to-digital converter (ADC) it must be supplied with clean DC power supplies. A noisy power supply can lead to lowered SNR and/or undesired spurious content in the ADCs output. This article provides insight on ADC power domains and sensitivities and addresses basic guidelines for supplying power to high speed ADCs.

To read the article, which original appeared at EE Times Europe (Power) and is presented here as a pdf file (no registration required), click here .

About the author
Michael Cobb is an applications engineer with the High-Speed Signal Processing Group, Analog Devices, Inc.

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