Maybe this is strange for someone working at Maxim Integrated, but to me it's clear that there is an argument for not integrating everything on a single large-scale SoC (system on a chip). Sometimes, it's better to keep certain functions separate.
As an example, think of a chip where a mix of high-speed analog functions and high-density digital circuitry is required. Technology requirements are different for the two parts of this mix, with the best process for low-power, high-density digital circuits (small geometry CMOS) not necessarily suitable for high-speed analog circuits.
In the recent history of integrated circuits, the constant pressure to reduce cost and power has led to higher and higher levels of integration. Solutions that start out as multi-chip solutions inevitably end up all integrated on a single (CMOS) die. This is not just the case for multiple digital chips, but increasingly for analog-digital mixed signal solutions as well.
For the digital functions, there is a continuing drive to smaller geometry CMOS to support higher density and lower power. However, the smaller feature size of this digital process results in worse analog properties such as SNR and headroom.
Headroom tells us the amount of extra range between the actual signal voltage swing and the available range or capability. With smaller geometry devices, the operating voltage is reduced, and with it, the available signal voltage range.
With digital process nodes hitting 28nm and below, analog properties become really non-optimal. This may slow future levels of mixed signal integration, or even reverse the trend. Integrating high-performance, high-speed serial interfaces (that require analog signal processing such as equalization) with the digital circuits they support may no longer be the best solution. Instead, utilizing a high-performance, high-speed serial interface IC featuring equalization could well become the norm.
There are additional aspects of designing high levels of SoC integration that can become problematic, including power dissipation, packaging, and risk. Read “High-speed I/O: On the road to disintegration?” for a more thorough discussion of these trade-offs.
Interestingly enough, this could lead to a split where most analog functions are integrated in a single chip to match the single large digital SoC. So maybe “analog integration” is the future after all…