I/O clock multiplier generates any output frequency

Austin, Tex.—Silicon Laboratories Inc. has expanded of its portfolio of reconfigurable, frequency-agile precision clocks to include a single input, single output jitter-attenuating clock multiplier IC.

The Si5319 any-rate precision clock is capable of generating any output frequency from either a crystal or reference clock input with 0.3 picoseconds jitter generation. The device supports a free-run mode of operation, enabling the device to be used as a frequency flexible, low jitter clock generator when supplied a crystal input. The Si5319 provides clock synthesis, clock multiplication and jitter attenuation in high performance timing applications such as SONET/SDH/OTN line cards, WDM line cards, wireless basestations, synchronous Ethernet routers, test and measurement equipment and broadcast video.

The Si5319 is based on Silicon Labs' patented, third generation DSPLL technology, which provides any-rate frequency synthesis and jitter attenuation in a highly integrated phase-locked loop (PLL) device that eliminates the need for external voltage-controlled
crystal oscillator (VCXO) and loop filter components. The Si5319 accepts any frequency from 2 kHz to 710 MHz and generates any frequency from 2 kHz to 945 MHz and selects frequencies to 1.4 GHz.

Pricing: For the lowest speed grade device, which supports a clock output frequency range of 2 kHz to 346 MHz, is $19.32 in quantities of 1K.
Availability: Now in a 6 x 6 mm, 36-lead QFN package. The device is available in three speed grades based on maximum output clock frequency.
Datasheet: Click here.

Silicon Laboratories Inc.,

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