Editor’s note: OK designers, pay attention to this series of tutorials for an in-depth understanding of these really useful amplifier architectures that will help you in your designs with a solid and insightful knowledge gained by these articles from the engineer I consider to be the foremost expert on high speed Current Feedback, Voltage Feedback and Fully Differential Amplifiers amplifiers (This is from my first-hand knowledge of working with him for many years in the field). File these articles away in your treasure chest of tech reference articles.
The initial edition in this series (ref. 1) explored the I/O range options for high speed Voltage Feedback Amplifier” (VFA) op amps. Here, we will pick up those same issues for the remaining two most popular high-speed amplifier types. First the “Current Feedback Amplifier” (CFA) and then the “Fully Differential Amplifier” (FDA). The I/O range options and considerations for the CFA will be pretty straightforward while the FDA brings a number of new I/O range issues and capabilities. Those will be shown here along with some of the application issues driving these device definitions with detailed parameters on a representative selection of both types included.
Input/Output Range issues for Current Feedback Amplifiers (CFAs)
The first commercially available CFAs appeared from Comlinear Corp. in the early 1980s as hybrid devices. The topology benefits greatly from symmetric NPN and PNP devices where those (vertical PNPs) first started to show up in IC processes in the mid to late 1980s. The first monolithic CFA from Comlinear (CLC400, ref. 2a) appeared in Oct. 1988 – within months of two earlier monolithic CFA introductions – the AD811 (ref. 2b) and EL2020(ref.2c). Even with 30 years of new CFA introductions, there are “NO” devices that include either supply rail in the input range.
The nature of the CFA requires a unity gain buffer across the V+ to V- pins in the typical op amp drawing. However, that V- (In- in Fig. 1) pin is also required to pass a bipolar error current up and down through current mirrors to each supply. Getting that cascoded error current (hence, “current feedback”) through the emitter followers at the V- node up and down to current mirrors off the supplies requires some headroom to the supplies for this unity gain buffer from the V+ input to V- node. A typical circuit diagram highlighting this very simple input buffer is shown in Figure 1 (ref. 2c). While this earliest device optimistically included offset balance pins (a carryover from the VFA IC designs), that external balance adjustment does nothing to improve output offset drift and rarely appeared in later CFA devices.
Circuit diagram for early CFA monolithic op amps (EL2020)
Similarly, while there are a few Rail-to-Rail Output (RRO) CFA devices (ref. 3), all other CFAs are non-RRO. The input buffer needs more headroom than most output stages. This has the effect of showing product choices with less headroom on the output vs. the input pins (and symmetric to each supply on both I/O). By far the dominant applications for CFA provide some non-inverting gain (or run inverting), so this increased headroom on the inputs is not a limiting factor for the output swing.
While all CFA devices are intrinsically unity gain stable (ref.4), since many of the applications are at some higher non-inverting gain, many devices are specified (and characterized) at gains of +2V/V and sometimes higher. In theory, the AC performance can be held constant for CFAs. However, the lower voltage swings required across the input buffer operating at higher non-inverting gains (or inverting where there is no voltage swing across the input buffer) will move the Full Power BandWidth (FPBW) limit to the main amplifier instead of the open loop buffer across the inputs.
Representative CFA devices grouped by application space.
So where would you find a CFA solution vs. the more prevalent VFA solutions? Very generally speaking, while VFA devices are commonly found leading up to ADCs, going away from a DAC to provide a signal generator function is dominated by CFA solutions. These offer significant large signal linearity vs. quiescent power advantages over VFAs due to their “slew rate on demand” capability. Many early CFA applications were simple video line drivers at a gain of +2V/V to recover the backmatch loss for video coax transmission. At the same time, the original genealogy for the CFA amplifier came from the HP Arbitrary Waveform Generator (AWG) output stages, and many signal generators continue to use a CFA device right behind that output BNC or SMA connector.
The largest opportunity for dual CFAs came with the emergence in the mid-1990s of the various twisted pair line drivers for the xDigital Subscriber Line (xDSL) domain. This has driven many product developments yielding general purpose dual CFA devices. Most recent developments for wireline drivers are specialized and only suitable to differential driver applications (ref. 5) – as opposed to 2 independent op amps. The core CFA remains ubiquitous in the various wireline communications – whether it be xDSL, PLC, G.Fast, Smartgrid, etc as the differential output driver. Dual coupled CFAs are often called “ports” in the datasheets to indicate one committed pair of push/pull CFA drivers.
Higher output current CFA solutions are usually found in AWG and wireline communications. This first CFA table will screen to >200mA linear output current and include both singles (AWG) and duals (xDSL). Some dual CFA line drivers do not even offer a single channel version (ref. 6). Also, some dual CFAs can only be used as differential push/pull output stages (ref. 7) where those will be excluded from Table 1. The dual CFAs shown here can be paralleled for a load sharing configuration or used independently for single ended line drivers.
To get newer, high output current CFAs, Table 1 also screened out:
- Output Headroom >2V
- If separate part numbers for disable and non-disable, only the disable version listed
- Input voltage noise < 4nV/√Hz.
- Fixed internal gain CFA’s.
- Obsolete devices
High output current single and dual CFA devices.
By far the fastest, high output current, CFA is the recently introduced THS3491 (ref. 8) – intended for AWG outputs. Note the generally higher max. Vs here to support higher output voltage swings for AWG or wireline drivers.
The range of CFA devices intended for lower output power is much wider including many single/dual/quad families. Again, all of these devices are also non-RRIO where usually a bit more headroom is required on the inputs vs the output. To reduce this table to a representative listing, only singles are shown where the same screens as Table 1 were used with only devices offering
Representative single channel CFAs for general purpose applications.
These are all permutations on the original CFA design of Figure 1, with one device (OPA684, ref. 9) applying a closed loop input buffer to provide more constant bandwidth over gain setting in a low power device. Using a closed loop input buffer stage reduces the open loop impedance looking into the V- input reducing that parasitic effect in the loop gain equation (ref. 4). There is a lot of similarity in the max operating supply voltage for the devices in Table 2 – indicating the complementary bipolar process technologies used are similar. There are no CMOS CFAs as can be seen looking at the Ib max column. These V+ input bias currents are always the cancellation of two bias currents. The V- input bias current is usually higher and un-related to the V+ bias current precluding bias current cancellation techniques to improve output offsets.
Input/Output Range issues for Fully Differential Amplifiers (FDAs)
The FDA has emerged since 1999 as a very popular way to drive differential input ADCs. Briefly, the FDA is a core differential I/O op amp with a 2nd common mode control loop. This 2nd loop senses the average of the two output voltages and acts to force it to match an applied (usually DC) Vocm input voltage (section 8.2, ref. 10). For those not familiar with the FDA, a typical DC-coupled, single-to-differential, ADC driver design is shown in figure 2 using a recent NRI, RRO precision THS4551 FDA (section 9.2.3, ref. 10).
DC-coupled, single 3.3V supply, gain of 5V/V from bipolar single ended source.
One new capability provided by FDAs is to take a DC-coupled bipolar input swing around ground and use a single supply solution to move it to a differential output swing around the desired common mode voltage. The voltages at the two input pins are always level shifted above ground. There will be an average voltage at the two input pins when the source signal is at midscale that will move up and down with the signal as a common mode voltage for the single ended input example of Figure 2. An easy way to see this effect is to focus on the feedback path on the lower FDA output side. It feeds back to a grounded resistor. Operating single supply, the FDA outputs cannot go below ground.
Hence, the divider back to the lower input feedback pin also cannot go below ground. The differential loop forces the input differential voltage to zero, giving the same common mode movement on the two inputs. This is the easiest way to see the input pins’ common mode movement – simply resistively divide the lower FDA (non-signal input side) output voltage swing by Rg/(Rf+Rg). More of the recent FDA’s are negative rail input (NRI) to get this easy operation from a bipolar, or ground referenced, input signal to a DC-coupled differential output using a single supply.
To get that NRI, many of these FDAs use a core VFA topology (with PNP inputs) for the signal path where the I/O range options match that of more typical VFA op amp devices (ref. 1). There are a few FDAs that use a core CFA design where those will be non-RRIO. One new consideration in the FDA is the operating headroom for the internal common mode control circuitry. All FDAs have an added control voltage input that sets the output common mode voltage – Vocm in fig. 2.
Since the two output pins need to swing differentially around this voltage, there are no FDAs that offer an output common mode voltage range that includes the supplies. It is more typical for that common mode range to have lower headroom to the negative supply than to the positive supply. Often, FDAs are operating single supply where the output common mode is shifted more towards ground (0.95V in fig. 2, a typical pipeline ADC Vcm ) to match up with the ADC requirements. Figure 3 shows a typical common mode control voltage headroom specification for a recent precision FDA (ref. 10).
Typical common mode loop headroom specifications for a NRI, RRO FDA.
The design flow for an FDA application starts at the output pins and works back towards the inputs. First, the output common mode voltage is set to what the ADC requires. For AC coupled output applications, the Vocm input pin can often be left floating where many FDA’s default that voltage to mid-supply – giving the most available differential output swing possible around that Vocm centered between the two supply voltages. The ADC required common mode would be re-established on the other side of these output blocking caps in this case.
The first step in assessing output swing limits is to add and subtract the differential peak Vpp /4 swinging around the Vocm voltage in opposite polarities. Each output side provides 1/2 of the total Vpp where then each pin swing +/-(1/2) of that around the Vocm voltage to generate the full differential swing. Getting that min/max absolute output voltage range can then be compared to the output headroom to the supplies to verify output clipping will not be occurring.
The more difficult (and new) consideration for FDAs is where the input pin voltages are operating. Briefly, assuming balanced resistor dividers on each side of the FDA, differential input designs will operate with fixed DC FDA input pin voltages that is the divider between the source common mode voltage and the FDA set output common mode. One of the confusing aspects of FDAs, operating either DC-coupled or AC-coupled on the inputs as a single ended input to differential output, is that the voltages on the FDA input pins will be moving in a common mode sense with the input signal. Returning to the example of Figure 2,
- The output common mode is 0.95V set by the Vocm input voltage
- The target maximum differential output at the FDA pins will be 2Vpp to get attenuated by this low insertion loss filter to a -1dBFS swing of 1.8Vpp for a typical pipeline ADC. Note using a differential R at the end of the filter maintains the FDA 0.95V output common mode to the ADC.
- Each FDA output pin then swings 0.95 +/- 0.5V or from 0.45V to 1.45V. This RRO FDA requires about 0.2V output headroom – these output swings will not clip using a single 3.3V supply.
- For a gain of 5, this is taking a +/-0.2V bipolar input at Rt to that output voltage.
- The FDA input pins move in a common mode fashion (215Ω/(1kΩ+215Ω))*(0.45V →1.45V) or 0.08V →0.256V (resistor divider from lower feedback path to input pin from the lower FDA output swing relative to ground)
Running a 2MHz square wave response simulation using TINA (ref. 11) on the circuit of Figure 2 gives the waveforms of Figure 4. Here, a marker on the lower level of the input pins shows the expected 80mV minimum. The important point is the input pins stay above ground which is in range for this NRI FDA. Keep in mind that differential 2Vpp output signal is actually 2 outputs swinging 0.45V to 1.45V 180deg out of phase.
2MHz +/-0.2V input at Rt square wave simulation of Figure 2.
This is one (of many) example flows showing the I/O pin operating conditions. More examples appear in section 8.3.3 “I/O Headroom Considerations” in the THS4551 data sheet (ref. 10). Considerably more detail in developing these new FDA operating conditions can also be found in Ref. 12. These early developments allowed imbalanced feedback dividers vastly complicating the equations. Assuming matched dividers (AC and DC) on each feedback path simplify these considerably and is much more representative of intended applications. The imbalanced developments do allow the effect of feedback divider imbalance to be shown.
Getting a true swing to ground for a RRO single supply FDA SAR driver solution
As mentioned in the I/O range options for VFA op amps (ref. 1), a true swing to ground (good linearity or SFDR) on a single supply RRO device can be achieved using the fixed -0.23V LM7705 regulator (ref. 13). Designers often steer away from this option due to switching ripple concerns (4mVpp at 92kHz for the LM7705). Precision FDA’s like the THS4551 have extraordinary PSRR due to their differential output construction (> 100dB through 100kHz, fig. 42, ref. 10).
An example design tested this combined solution using an 18-Bit SAR ADC (ref. 14). This example was using a 0V →4.096V swing on each FDA output pin for a total 8.192Vpp maximum differential input to this 18bit, 1MSPS, SAR ADC. Attenuating the 4mVpp negative supply ripple by a 100dB -PSR give only 40nVpp differential output due to supply ripple. Recognizing this is far below the (8.192V/(219 )) = 15.6μV 1/2 LSB, this supply ripple around 92kHz should be invisible in the FFT. Quite a range of issues are considered in ref. 14, but finally in fig. 85 a 2kHz full scale input FFT is shown where nothing shows up around 92kHz. That result is repeated here as fig. 5 where the harmonic terms for this 2kHz full scale input are also phenomenally low showing how well these new low power FDAs drive precision ADC’s.
FFT for the THS4551 signal path with LM7705 switching -0.23V supply (Fig.85, ref.14)
Representative FDA devices grouped by application space.
Most recent FDA devices break into devices intended for precision ADC drivers and those more focused on very high-speed pipeline ADC’s. The precision FDA’s are all RRO where most are NRI. A few are RRI giving a much lower input pin headroom to the positive supply. There are a few applications that move the input pins close to the positive supply where attenuating from a high positive common mode voltage might be one. Many more applications have either a bipolar, or ground to some positive, input swing where the NRI capability is all that is required.
Table 3 shows precision, VFA based, RRO, FDAs also screened for:
- Singles only (many of these have dual versions)
- Max. Input offset voltage <1mV
- To get newer devices, 1k price < $3.00
- No fixed gain versions
- No obsolete devices
Precision RRO FDA devices.
As operating bandwidths increase, FDAs have emerged in every combination of I/O range capability. Many of these are designed at higher minimum gains (VFA min. stable gain) to get higher closed loop bandwidths where LTC even offers a range of minimum gains in the LTC6404 family. Many of these very high BW applications are AC coupled, so some of these FDAs allow poor input DC offset voltage. At the highest SSBW, none are RRO but a few are NRI to handle very high-speed DC coupled pulse applications where the input signal is a ground to +Vin.
There are even a few that are non-RRO but RRI. Almost all of these are VFA based with 2-CFA based devices (LMH6554 and ADA4927-1) where they are both non-RRIO as is typical of all CFA designs. As might be expected, these CFA type FDAs are often used for differential output AWG applications. To reduce Table 4, only single channel versions are shown, and the following were screened out:
- Input noise >2.2nV (for broadband applications, lower integrated noise often desired)
- SSBW < 500Mhz (this does give one overlap with the precision table 3, the THS4541)
- Only disable version shown if two versions.
- No fixed gain versions
- No obsolete devices
The highest speed FDAs.
These are all bipolar (normally complementary) IC processes. Note the big increase in max Icc to deliver FDAs in this highest speed range. The lowest input voltage noise of 0.9nV/√Hz appears in the decompensated VFA ISL55210 and in the CFA based LMH6554. The latter will actually show higher total output noise due to its higher current noise intrinsic to CFA designs.
Conclusions to I/O range issues for CFA and FDA devices
The CFA offers big advantages for high power output drivers but normally comes without swing to rail on the outputs and always neither rail on the input pins. This rarely limits its applicability as AWG output stages or high-power differential line drivers. The FDA has had most of the recent high-speed amplifier introductions where the VFA based versions offer similar I/O range options to the VFA type op amps.
Most recent work has focused on either RRO with NRI precision devices or much higher speed FDAs with non-RRO and either non-RRI or NRI input stages. The non-RRO output stages are needed for the highest closed loop bandwidths, but some of those applications can benefit from an input swing closer to the negative supply. As shown in the DC coupled bipolar input example of Figure 2, single supply operation from a bipolar input to differential output using an FDA is a new capability if the FDA input range extends to ground. Next up, DC error consideration in high speed amplifiers.
References for I/O range issues for high speed CFA and FDA amplifiers
- Input and Output Voltage Range Issues for High Speed Amplifiers, Insight #1, Planet Analog, Oct. 25,2018
- First three monolithic CFA op amps introduced in 1988.
- Rail to Rail output CFA devices
- Comlinear Application Note, OA-13, Current Feedback Loop Gain Analysis and Performance Enhancement
- Very recent dual, coupled channel, CFA line drivers for PLC – can only be used differentially.
- TI “Dual, Wideband, High Output Current Operational Amplifier”, OPA2677
- TI “Single Port, High Output Current VDSL2 Line Driver with Power Control”, OPA2670
- TI “900MHz, 500mA High Power Output Current Feedback Amplifier”, THS3491
- TI “Low Power, Current Feedback Operational Amplifier with Disable” OPA684
- TI “Low Noise, Precision, 150Mhz, Fully Differential Amplifier”, THS4551
- TINA simulator available from DesignSoft for <$350 for the Basic Plus edition. Includes a wide range of vendor op amps and is the standard platform for TI op amp models.
- Early, very thorough, operating equation developments for FDA’s
- TI regulator, “Low noise negative bias generator”, LM7705
- TI Designs, TIDA-01050, Optimized Analog Front End DAQ System Reference Design for 18-bit SAR Data Converters