 # Input bias current matters in precision measurements

Input bias current is a usually overlooked amplifier parameter that can have a significant effect on an amplifier circuit’s output accuracy. Sometimes the effect is small enough to be ignored, but sometimes it can cause a circuit to fail entirely. Engineers designing for precision applications such as current sensing or sensor interface should be aware of the input bias current effect so that they can ensure a robust design.

Typically, key parameters that come to mind for precision applications are input offset voltage, offset drift, and CMRR. So how does input bias current factor into this when amplifier inputs are normally considered to be high impedance? The simple answer is that the input bias current creates what is essentially a parasitic voltage across any resistance in its path, and the effect of this is magnified by the amplifier.

Definition of Input Bias Current

First, let’s look at what input bias current means. An ideal operational amplifier (op amp) does not have any current flowing into its input terminals; but real-life op amps do. The input bias current (IIB) specification in a datasheet quantifies this non-ideal current. Input bias current can create an additional offset voltage drop at the input, leading to an offset error at the output. For most applications, this error is negligible, but there are some cases where it is important to consider.

Historically, op amps have been built with bipolar junction transistors (BJTs). For a bipolar op amp, such as the LM324, a small amount of current flows between the base and emitter when the input differential transistor is on. In other words, the base-emitter current is the amount of current needed to bias the transistor. This current is usually in the range of nanoamps or microamps. For a PNP input pair, the current flows out of the input transistors, as Figure 1 shows for a simplified PNP input stage of a bipolar amplifier. In the case of a rail-to-rail input bipolar op amp, an additional NPN input pair would be used and the current would flow into an NPN input stage. Figure 1 This simplified input stage of a bipolar op amp demonstrates how input bias current can alter amplifier output.

However, most new amplifiers nowadays use CMOS transistors. With a MOSFET, the gate is physically isolated from the conduction channel to create an input that is truly high impedance. These types of amplifiers do not have a real input bias current. Yet, the input bias current parameter is still used on datasheets for these amplifiers. In this case, the so-called input bias current of a CMOS amplifier is mostly leakage from ESD structures, protection diodes, and/or parasitic junctions. As a result, CMOS amplifiers such as the NCS20071 will have much lower input bias currents than bipolar amplifiers. For the CMOS op amp, input bias current can have positive or negative flow depending on the conditions. Figure 2 shows a representative simplified input stage for a CMOS op amp with PMOS inputs. Figure 2 This simplified input stage of a CMOS op amp input stage shows how leakage can act as an input bias current.

Each input pin in the CMOS op amp has its own input bias current, and the IN+ and IN- pins may have different input bias current values. The datasheet may specify the IIB current through one of the input pins by noting it as IIB+ to refer to IN+, or IIB- to denote IN-. The mathematical difference between the two input currents is then referred to as input offset current, IOS.

On any given datasheet, the direction of input bias current flow is not always defined — the datasheet limit might show just the absolute value — so the current may flow into or out of the pins. Unless indicated otherwise, then, assume that the IIB and IOS are absolute values. The currents may also change. Figure 3 shows how the input bias current can change as the input common mode voltage is varied for the NCS20071. Figure 3 Input bias current (IIB) and input offset current (IOS) will vary over the applied common mode voltage for an op amp.

The Input Bias Current Effect

These input bias currents can affect the amplifier’s output. If there is a large resistor in series with the op amp input, for instance, the IIB flows across it and adds an offset. For example, consider the schematic shown in Figure 4. A 1 MΩ input resistor into a voltage follower circuit (also known as a unity gain buffer circuit) with IIB = 10 nA creates an additional 10 mV voltage drop across the resistor, resulting in a 10mV output error. Figure 4 Input bias current creates a voltage offset in this unity gain circuit.

In an effort to remove any offset voltage created by IIB, sometimes circuit designers will try to match the input resistance seen by both the op amp’s non-inverting and inverting input terminals, as shown in Figure 5. Yet, if the bias current is mismatched, the resulting input offset current (IOS) can still create an additional input offset voltage. This offset voltage created by IOS contributes to the error at the output and can become a concern in precision applications where very small input signals are being measured. Figure 5 Input resistance matching can reduce the effect of input bias current if both input terminals have the same input bias currents and minimal input offset current.

Considerations for Current Sense Amplifiers

A dedicated current sense amplifier is a special case to consider. Many current sense amplifiers have a specialized architecture that allows the input to go above the supply voltage, such as with the NCS210R. While this is advantageous for a number of applications, it requires the circuit to draw an increased input current — in the range of tens of microamps — making the circuit particularly more sensitive to external input resistance for the reasons discussed previously. Figure 6 demonstrates this, where the “additional circuitry” that allows the extended common mode range creates the large input bias currents noted in red colored text. Adding large external resistors to this circuit means that the input bias currents will create a larger voltage across each resistor. Figure 6 Current sense amplifiers have significant bias currents, so the external resistors should be kept to 10 Ω at most

With this architecture, the input bias current takes effect on the external resistors only. The internal resistors R1 and R3 do not have IIB flow across them. Since the standard gain equation for a difference amplifier assumes that the current flow is the same across the external and internal resistors, the gain becomes somewhat distorted from the intended value. As a result, the standard equation becomes only an approximation of the resulting gain, as denoted by the approximately equals sign: The external resistors also negate the high gain accuracy that precision ratio-matching of the internal gain resistors works to create. This type of current sense amplifier architecture relies on the ratios between the internal resistors to set the gain, instead of relying on the absolute accuracy of resistors. Even if all the internal resistors are +10% from the nominal value, the ratio matching means that the gain will be within the datasheet’s ±1% gain error specification. External resistors, even with high accuracy, can throw off the entire ratio matching. This means that adding input resistors can actually have a compounded effect, creating gain error due to resistor ratio mismatch as well as due to IIB, which was discussed in the previous paragraph.

On top of these errors, an additional offset voltage error due is created by IOS, as a recent ON Semiconductor application engineering case demonstrates. The customer was an engineer who wanted to customize the gain of a current sense amplifier by adding 1 kΩ resistors in series with the inputs of a NCS210R in a high-side current sensing circuit, the schematic of which is shown in Figure 7. But the result was not what the customer expected. The actual adjusted gain was 167 V/V instead of the NCS210’s standard 200 V/V gain as calculated assuming ideal resistors and the standard gain equation for simplicity. Figure 7 The difference in input bias currents will result in an input offset current, IOS. With the addition of external resistors, an added input offset voltage, denoted by VIN, is added to the equation, creating an error greater than the input offset voltage alone.

With the addition of the external resistors, the IOS had a significant effect that outweighed even the internal offset voltage, VOS. The NCS210R has a typical input offset current of IOS = 0.1 µA, as stated on the datasheet. This current adds 1 kΩ x ±0.1 µA = ±100 µV error (typical) at the amplifier’s input. In this case, the typical input offset current creates an input offset even larger than the maximum input offset voltage of VOS = ±35 µV, which is listed in the product datasheet. Both of these input offset voltages are essentially multiplied by the gain and added as an error to the output.

While the customer’s designers may have expected ±6 mV output error due to VOS, they overlooked the fact that IOS would add at least ±17 mV of additional output error. That error becomes even larger if the IOS is larger than the typical noted in the datasheet.

The solution to the customer’s problem was fairly straightforward. If the NCS210R’s standard gain of 200 V/V was too high for their application, they would need use the 100 V/V version of the amplifier (NCS214R) and not add any external resistors. This absence would eliminate any error from IOS. They would then have to increase the sense resistor value accordingly to maintain the same voltage at the output, which would also decrease the overall error due to input offset voltage. The tradeoff here is that a little more power is lost across the sense resistor when its value is increased.

The key point to remember when using current sense amplifiers with this architecture is this: as long as no external resistors are added to the current sense amplifier, the intrinsic IIB and IOS have no detrimental effect!

Considerations for Precision Op Amps

For a current sensing application that requires a specific gain value that is not readily available in an integrated current sense amplifiers, one possible solution is a precision op amp such as NCS21911. To perform the current sensing function, the precision op amp can be implemented as a difference amplifier with an external gain network. The challenge of this approach is achieving sufficient matching between the resistors in the gain network to establish the needed gain accuracy and CMRR. The required precision-matched resistors can be expensive. However, this solution can potentially reduce the error created by the input bias current in applications with very specific gain requirements.

It is important to note that precision amplifiers can have their own unique input bias current behavior. The zero-drift architecture commonly used in precision amplifiers is implemented by periodically sampling the input and correcting for it. As a result, there are current spikes at the input due to the charge injection and clock feedthrough on the capacitors and switches. The IIB listed on the datasheet is an averaged, DC value, but the current spikes are there. In this case, using very large external input resistors is not recommended. Adding a simple RC filter with a cutoff frequency below the chopping frequency can be used to minimize voltage spikes if needed. This intrinsic behavior limits the zero-drift amplifier from being used as a transimpedance amplifier. However, zero-drift amplifiers continue to be a reliable choice for current sensing applications.

Conclusion

For most applications, input bias current is not typically considered an important parameter. Even so, there are certain scenarios where it does have a significant effect on performance, and understanding it makes all the difference for a successful design. By understanding how input bias current can create an additional input offset voltage factor, circuit designers can understand how to ensure the best accuracy possible for precision applications.