Advertisement

Article

Integrating Power Management and Audio Blocks on the Same Chip


Modern mobile phone design increasingly requires high performance audio processing circuitry to enable inclusion of features such as digital audio players and digital quality voice. One of the key challenges in keeping the electronics sub-system cost low is to integrate this capability with the power management circuit on the same piece of silicon. This article describes the issues involved in each of the sub-systems and how the integration is implemented to combine power management and audio processing blocks in pure CMOS technology.

The first question one might ask is, why should power management and audio blocks be integrated on the same chip? Is this the right partitioning for the overall system? Analyzing the building blocks in a typical power management integration (Figure 1 ) illustrates how this partitioning might be ideal for high performance and small chip count.

The Power Management System

A power management system typically contains voltage regulators, switching regulators, charger control blocks, support functionality such as reference voltage and current generation, and a digital control for the start-up and supervision of the baseband. With actual partitioning, the IC is directly connected to the battery, which defines the supply voltage range. A Li-Ion battery is charged up to 4.2 volts. Allowing for malfunction, an additional margin has to be added. This means that the IC has to be capable of withstanding voltages up to 5.5 volts.

Low dropout voltage regulators (LDO) create supply voltages for various external ICs. In newer systems they are used for all analog supplies in the system, including RF-blocks. The most important specification parameters are the power supply rejection ratio (PSRR) and the quiescent current. Dialog Semiconductor uses a new advanced technique called 'Smart Mirror' for its LDO structures. This concept enables better system performance combined with low current consumption.

Supply voltage up to 5.5 volts
(directly connected to battery)
Tolerance at VOUT ± 3%
Current consumption without load < 10 µA
Power supply rejection ratio > 80 dB

Table 1:  A typical specification for a LDO

With system complexity increasing for new wireless standards such as 3G, the number of regulators required jumps up accordingly from about three to four in earlier systems, to about 15 regulators in 3G systems. This adds peripheral area and pincount.

In new generation systems, the buck converters are integrated too. A buck converter improves efficiency and reduces thermal dissipation. 3G base bands take up to 500 mA at a voltage of 1.8 volts. With a typical battery voltage the “wasted” power compared to the delivered power is 50%, if a LDO is used.

Battery voltage 3.6 volts
Output voltage 1.8 volts
Output current 0.5 A

Table 2:  A typical specification for a buck converter

A switching buck regulator reaches an efficiency of better than 90% and therefore the dissipated power in the device is limited and the standby time and talk time is increased. In addition the self-heating of the device is reduced. This avoids the need for a power package with very low thermal resistance. With standard BGA packages a thermal resistance of 40K/W is achievable, which will limit the consumed power inside the power management to 1W.

Digital control in power management blocks has been growing for each generation. In the actual integration, 7,000 equivalent gates are required to control the start-up and shutdown sequence and to support the baseband with additional functionality. For comparison, a standard 8051 8-bit microcontroller contains about 5,000 gate-equivalents.

The requirements listed so far define the process for an effective power management integration:

  • 5.5 V for analog function blocks
  • High digital density.

To combine the different requirements, Dialog Semiconductor's approach is to use a pure CMOS dual-gate oxide process, which allows digital gates with small feature size and supports voltages up to 5.5 volt for analog blocks.

How Does This Process Support the Audio Blocks?

State-of-the-art audio integration requires mono and stereo output drivers, microphone input stages, and high quality CODEC (coder and decoder for digital signals to analog signals). In general the CODEC has to support all existing sampling rates starting from 8 kHz (which is the actual voice quality for mobile phones) up to 48 kHz (which is improved CD-quality).

In GSM systems, the voice is sampled with 8 kHz. UMTS uses 16 kHz. But for high-quality applications such as MP3 players or voice recording for personalized ringing tones—which is now becoming a norm in state-of-the-art handsets—a higher audio quality is required. Dialog Semiconductor's audio CODEC has been designed to support all sample rates up to 48 kHz for playing and recording audio data.

The mono audio driver is split into two blocks. For the normal speaker in the phone a handset output stage is integrated and for the handsfree speaker a high power output stage is used. In some applications, one speaker is used for both modes and therefore both drivers can be connected together. The main parameter for handsfree is the maximum output power. If connected directly to the battery, then 0.5 Watt into a 16 Ohm speaker can be achieved. To deliver still acceptable audio quality the speaker is connected in differential mode. This filters any ripple in the power supply, for example, a GSM ripple caused by a RF power amplifier.

For the handset mode, the requirements for output power are much smaller. For this reason the handset driver is supplied by a LDO. This, in addition to differential control, improves driver performance.

The stereo audio driver is connected to the headset. A standard stereo headset uses three wires to connect the speaker to the amplifier. For this reason the amplifier drives the headset in single ended mode—a mode that is more sensitive to any kind of distortion at the power supply. Therefore an audio LDO is integrated to drive the output driver. This approach allows Hi-Fi quality output signals.

The CODEC part is the heart of the audio section. It is split into TX (A/D converter) and RX (D/A converter). Each block again can be split into a digital signal processing block and an analog modulator section. Digital signals are provided by an I2S interface and the CODEC can act as a master or slave for the I2S communication. The digital interface is programmable to support all different operating modes of I2S (256 different modes). In addition, a self adjust mode to automatically detect the sample rate is implemented.

This flexibility leads to a complex digital part with approximately 50,000 equivalent gates. For area efficiency this block is designed with minimum feature size of 0.25 µm. The analog modulator is built by multi-bit DAC to achieve Hi-Fi quality data conversion with good total harmonic distortion and signal to noise value. The architecture and control of the modulator is done in such a way that it is insensitive to both process variation and clock jitter.

Combining the Two Sub-Systems

The process requirement for the audio section needs a pure CMOS dual-gate oxide process identical to the power management part. In addition, audio blocks add few pins compared to required area in the core. Typically sole power management circuits with up to 15 regulators are pad-limited and the audio blocks help to achieve the right balance between core area and pincount. Adding audio blocks to a power management system gains extra functions with only a small cost increase.

The tendency for the baseband chip is to go to smaller feature size and therefore lower supply voltage capability, as well as reduced analog performance. Actual GSM systems very often have the voice CODEC for communication integrated in the baseband, but for the UMTS system, the performance of the CODEC integrated in the baseband is no more adequate. The handsfree audio amplifier can't be integrated in the baseband chip due to voltage requirements.

Overcoming the Coupling Isolation Issues in a Mixed-Signal ASIC

A key challenge with any mixed-signal design is the coupling/isolation between different circuits in the same IC. If high-end audio features, RF regulators and switching regulators are integrated on the same silicon, coupling can influence the functionality of each building block.

To solve coupling issues, the possible root causes must be identified.

The distinct categories of coupling are classified as:

  1. Supply coupling
  2. Reference/biasing coupling
  3. Capacitive routing coupling
  4. Substrate coupling.

To ensure highest performance, you must minimize all four coupling mechanisms. Each of them can drastically impact the performance.

Supply Coupling

Common supply wires are the main root cause for this coupling. To minimize it, the routing has to be done as starrouting. For switching components the bondwire must also be separated.

This can be separated into internal coupling, bondwire coupling and external coupling. As far as the chip is concerned, only the internal and bondwire coupling can be optimized. External coupling has to be handled properly at the PCB layout—but in general, the external coupling can be neglected because the series resistor of the PCB metal tracks is very low. For this example, it is assumed that this external routing does not contribute to any routing.


Figure 2:  Common supply routing

A current flowing through Block A creates a voltage drop via Rwire from VDD and VSS. This will modulate the power supply of Block B. If Block B is now very sensitive to high frequency spikes (for example, Block A is digital switching logic), the output of Block B will be disturbed by the supply modulation.

To avoid this coupling, all blocks that consume dynamical current must be separately routed. Only blocks with small and constant current demand can be connected together.


Figure 3:  Starrouting

Any current for Block A does not influence the power supply of Block B. The power routing is done separately for each block from the pad. This approach causes a higher top-level routing factor, because parallel metal tracks have to be routed. Therefore it is only used for blocks that consume dynamical current or high currents.


Figure 4:  Perfect Starrouting

If Block A creates very fast transients, the bondwire will become important due to its inductive behavior. In such a case, two separate pads are used to supply the different blocks. The new starpoint is now no longer inside the chip, but outside by two different bonds to the same pin at the package. For the very best coupling, this starpoint can be shifted more and more to the source of the supply.

Reference/Biasing Coupling

In general the reference and biasing coupling is very equal to supply coupling. The major difference is the impedance. As the power supply is normally of very low impedance, references are more sensitive to any kind of kick back noise. To avoid one block influencing another block, the reference should generally be starrouted. For best decoupling a small R/C network would improve it too.


Figure 5:  Reference/biasing coupling

Capacitive Routing Coupling

If two wires are routed in parallel for a longer distance, the fringing capacitor increases. Now, if one of the signals is a reference voltage and the other signal is a switching clock signal, the reference will be disturbed by the clock.


Figure 6:  Clock distribution for capacitive routing coupling

To avoid the routing coupling, a shielding wire has to be routed in parallel to the sensitive node.


Figure 7:  Addition of a ground wire in capacitive routing coupling

Substrate Coupling

Substrate coupling is a mechanism which can't be modeled. This depends on a number of different factors:

  • How well the substrate is connected to ground
  • Guard rings
  • Distance
  • Components.

To minimize substrate coupling, big components (for example, the switching NMOS and PMOS) are in its own well. Also a general guardring has to be around these components. In addition, sensitive and noisy blocks must not be located close together.

Conclusion

A complex mixed-signal IC with two different subsystems such as power management and audio can only meet the desired performance data if all coupling mechanisms are identified and optimized. It is always a trade-off between performance data and die area, which is directly linked to the costs.

The challenge is to find the best compromise and to add the additional improvements only to the blocks, where it is needed. In this article it has also been demonstrated that the process for power management is identical to the requirements for audio blocks in the actual integration, which is also true for future architectures. With appropriate system partitioning, the baseband chip is not restricted by analog functions and the lowest available feature size can be used for this digital processor. Power management and audio functions can be combined into a mixed-signal IC with the advantage of full integration of the audio including all required amplifiers.

An integrated power and audio system from Dialog Semiconductor (Figure 8 ) combines power management with regulators and switching buck and boost converters together with high quality audio components, in a Dialog Semiconductor 0.25 micron process with 5.5 and 2.5 volt capabilities.

About the Author
Manfred Plankensteiner is responsible for the energy management and audio product group at Dialog Semiconductor, based in Germany. He received a diploma in engineering for communications electronics in 1990 from the vocational college (Fachhochschule) in Munich, Germany. Prior to Dialog Semiconductor, he held various design-related positions at STMicroelectronics in Munich and at Texas Instruments in Freising and Dallas.

0 comments on “Integrating Power Management and Audio Blocks on the Same Chip

Leave a Reply

This site uses Akismet to reduce spam. Learn how your comment data is processed.