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Layout guidelines help manage video equalizer’s return loss (Part 2 of 3)

(Note: You can read Part 1 here)

II. TDR based measurement:
A second, more modern-day method of measuring return loss is by using the time domain reflectometry (TDR) ability available in current wide-bandwidth oscilloscopes. The final return-loss measurement is usually obtained as an output of the post measurement-processing software present in the oscilloscope. In TDR, a fast rise-time pulse is transmitted through the medium. When this pulse meets impedance discontinuities, a certain amount of the pulse's energy is reflected back, an amount which depends on the difference between the characteristic impedance of the medium and the impedance at the point of discontinuity.

Additional software converts the time domain measurement to a frequency-domain value and reports the S-parameter values. This is represented just as the network analyzer does, with the return loss on the y-axis in dB and the frequency on the x-axis in log scale.

Calibration of the TDR module of the scope using the appropriate calibration kit (also calibrating out the responses of connectors and cables) has to be performed. Additionally, there is a need to adjust the window of response in order to measure the entire. Once the device under test (DUT) is connected to the module, the TDR shows the response in time domain (log scale graph) and frequency domain. (For detailed guidance on how to set up a network analyzer and TDR modules with explanations on how to use the Smith chart, see Reference 3 ).

Termination
To counter repeated signal reflections in a transmission link, impedance is added to the transmission line in a variety of ways to match the characteristic impedance of the transmission line. This is known as termination.

Since the equalizer has differential inputs and outputs, and signal transmission is done single-ended, the input or output of the device that is not used is terminated with an impedance equal to the characteristic impedance of the transmission medium. The matching network is designed with the assumption that there is a cable connected. Hence if left unterminated and the signal comes in through one input, the path through the other input is one without a continuous impedance path.

Single-ended termination
The fundamental idea behind termination is to match the ends of a transmission line (where the line meets a source or a load) with a characteristic impedance equal to that of the line so that all waves are absorbed and reflections are minimized or avoided altogether. In Figure 4 , if there is a non-zero intrinsic driver impedance, then Rs is reduced by that amount so that the sum adds up to 75 Ω.



Figure 4: Single-ended termination

(Click on image to enlarge)

When a circuit is source terminated, there will be reflections returning from the receiver but the source-terminating resistance will absorb these. However, the use of source termination also results in diminished amplitude. When a circuit is end terminated, any signal arriving at the receiver is absorbed completely and there are no reflections. There is also power dissipated at this parallel impedance. Figure 4 shows both these kind of terminations. Note that only one type is necessary at a time.

Differential Termination
In a differential pair, Figure 5 , each line has to be terminated to match the characteristic impedance of the line.



Figure 5: Differential termination

(Click on image to enlarge)

A common way to do it is doubling the impedance and connecting it across the differential pair since the midpoint of the true and complement of the differential pair is an AC ground. The termination components should be placed as close to the receiver as possible so that another transmission line is not formed between the terminators and the receiver.

Board and Layout guidelines pertaining to the video broadcast devices

a) Tracks or Traces
For the purposes of voltage reflections, any trace whose propagation delay is more than twice that of the rise or fall time of the signal is to be considered a transmission line. If the trace's propagation delay were such that the signal got reflected and returned to the source while the signal was still rising, it would get absorbed. If the signal had already risen, this would lead to distortion of the signal.

To calculate the propagation velocity of a transmission line with a known dielectric material, use this basic equation:


(Click on equation to enlarge)


At high frequencies, a transmission line becomes equivalent to a distributed parasitic capacitance and can distort the signal.

The video transmission system is defined for a characteristic impedance of 75 Ω. If the cables that transmit the signal are 75 Ω, the traces on the boards where these signals originate or terminate should be 75 Ω to avoid discontinuity in impedance in the signal path.

Figure 6a is a cross-section of a PC board and Figure 6b gives the related impedance equations. Parameter εr represents the dielectric constant of the dielectric material used in the board. H represents the height of the dielectric material, t represents the thickness of the trace and W represents the width of the trace.



Figure 6a: Cross-section of a surface PC-board trace

(Click on image to enlarge)



Figure 6b: Impedance equation for PC-board trace

(Click on image to enlarge)

One basic rule that can be followed is to end the trace at the pad with a 'tear-drop' shape instead of abruptly as shown in Figure 6c . This will avoid sudden impedance changes.



Figure 6c: Tear-drop shaped pads (source: www.smtnet.com/bob-willis/pbdai.html )

(Click on image to enlarge)

Since current flows in a closed loop, the longer and more convoluted the loop is, the worse it is for signal integrity. This is because a longer or more convoluted loop results in a higher inductance in the current path, which in turn degrades the signal quality. Hence, ideally, the ground plane should be directly below the signal trace and should have no interruptions in the return path such as vias or routing via multiple layers.

In addition to signal integrity, current loops that are long produce EMI and are susceptible to EMI from other traces.

b) Cutouts

When a component is soldered onto a pad on the board, the pad and the ground or power plane beneath it form a stray parasitic capacitance. This stray capacitance adds to the effect on the input network of a device, like an equalizer (and also output network) and hence affects the return loss at the port. To avoid this, the ground and power planes are cutout from underneath the input network and pins.

c) Placement of input/output network components

The purpose of the input and output networks for high speed devices are to optimize the return loss of the device ports. To the external world, the network should seem as if it is a part of the device characteristics. This means the components should be placed as close to the input or output of the device. Additionally, the device itself should be placed as close to the connectors as possible so that the trace length for carrying the signal in or out is minimum.

d) Some of the important practices to follow for a differential signaling layout, Figure 7 , are:

  • Keep the differential pairs as short as possible
  • Keep the pairs to the same layers and do not route through any vias as this leads to impedance changes.
  • Ensure a large spacing between two pairs to reduce impedance variations and any effect of a neighboring pair.
  • Keep the intra-pair and inter-pair spacing as constant as possible.



Figure 7: PC-board layout for differential signal traces

(Click on image to enlarge)

There are two capacitances involved: one between the top via pad and the reference plane above it, and one between the bottom via pad and the reference plane below it. The inductance is that of the barrel and contributes a series inductance to the signal path.

e) Vias and connectors

A via is a barrel-shaped connector used to transfer a signal path between different layers on a board. The via is electrically modeled in Figure 8 .



Figure 8: Electrical model of a via

(Click on image to enlarge)

The effects of a via are:

  • The capacitance has the effect of slowing the edge rate of the signal
  • If the signal has to pass through several consecutive vias, the effective characteristic impedance is decreased.
  • The series inductance adds to the system's inductance and affects the signal integrity by affecting characteristic impedance.

Therefore, best practice concerning vias for equalizers and cable drivers is to avoid use of vias for critical, high-speed signals, or try to minimize them as much as possible, since consecutive vias will change the characteristic impedance of the medium.

For connectors, the length of the connectors should be minimized so that the inductance is kept to a minimum, which in turn will reduce impedance discontinuities.

Debugging the board for return loss
The screenshot in Figure 9 of the return-loss measurement taken by a network analyzer shows clear peaks and valleys. This graph, Figure 10 , is quite useful in determining the impedance characteristics of the board on the path of the signal. Return loss depends directly on the difference between the characteristic impedance of the medium and the load.



Figure 9: DR measurement of return loss

(Click on image to enlarge)



Figure 10: Return-loss graph of video equalizer

(Click on image to enlarge)

If, at a particular frequency, a certain capacitive or inductive reactance peaks, this will cause the load impedance ZL to either increase or decrease. If this movement of ZL is such that it increases the difference between Zo and ZL , the return loss will also peak. If, on the other hand, the movement is such that it decreases the difference between the two, the return loss will dip.

On the other hand, if the return-loss profile is flat all through and not bumpy, it shows that the impedance component is not sensitive to frequency, which can only mean that the load is mostly resistive.

The TDR method described earlier for measuring return loss is also useful in verifying the board design and fabrication quality. In the time-domain measurement mode on the oscilloscope, connecting the inputs or outputs of a board to the TDR module's ports will result in the impedance profile of the transmission line.

When configured with the correct dielectric constant, and the horizontal scale is set to display length in meters, the profile on the scope will show the impedance against length. Any discontinuities in impedance will show up on this profile, and it can be used to verify if the board has been fabricated according to design, and if that design results in the desired transmission line characteristics.

This response can be used to vary the position of placement of terminating components and the value of the inductor in the return loss network.

(Part 3 examines a case study in detail, you can read it here)

References
1. “Using S-parameter data effectively,” Wilfredo Rivas-Torres, Agilent Technologies, Planet Analog , March 27, 2006.
2. “The Smith chart: more vital after all these years,” Bill Schweber, EDN , March 18, 1999.
3. “Return Loss Layout Guidelines for the Video Cable Equalizer,” available at www.cypress.com.

About the Authors
Mukund Krishna is an Applications Engineer for the lighting solutions group (EZ-Color) at Cypress Semiconductor Corp.at San Jose, CA. His responsibilities involve development and evaluation of demo systems, supporting customer designs from initial concept to design completion, creating product collateral and new product definitions. His experience at Cypress involves being an applications engineer for physical layer devices for high-speed communication interfaces including professional video broadcast. Mukund received an MSEE from the University of Southern California. He can be reached at ukk@cypress.com.

Jeff Hushley is a Staff Applications Engineer at Cypress Semiconductor Corp. His expertise is in the characterization and systems analysis of high-speed serial digital communication devices in broadcast and consumer video applications. He has a Bachelors Degree in Computer Engineering from the University of Toronto. He can be reached at fre@cypress.com.

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