For a number of years now we have seen leadless DFN packages (discrete, flat, no-leads) for discrete components which, compared to conventional SMD packages, do away with contact and assembly terminals extending from the side. Instead, the terminals have been moved to the underside of the package.
The major benefit of this configuration is the reduced area for a given electrical function on the board because the space taken up by the terminals is eliminated. This DFN technology enables the use of very flat lead frames with large outer contact faces acting as a heatsink.
The result is a low installed height and, compared to conventional SMD packages, a much improved capability to dissipate heat from the interior. These DFN packages have already become established as a standard form in end applications where a small form factor and its accompanying design advantage contribute directly to added value. Smart phones are a striking example where the smallest possible form per function is of the upmost priority and a driving force in further development of package technology to both increase functional density and enhance the degree of freedom in designing an end application.
To date, the benefit of this area gain was partially offset by challenges in verifying assembly of the components on a board by optical control instruments. Unlike standard SMD packages, there are no visible solder pads on the side of the package which often serve to check the quality of soldering when placing these DFN packages.
Through the introduction of a new generation of leadless packages, it is now possible to combine the benefits of DFN with those of standard SMD packages. What is characteristic of these packages is that they feature contact pads not only on the underside but also on parts of the side faces. In addition to the purely physical presence of metal pads on the side, as already found in many DFN packages, effective use of this feature requires completely reliable side wetting in conventional soldering. Such wetting capability is not usually sufficiently reliable on purely copper surfaces. The side-pads first have to be tin-plated in the same way as the undersides, and then complete wetting can be implemented by conventional soldering processes.
This article, from EE Times-Europe , looks at this package's main attributes and characteristics, in terms of both thermal design and PC board solderability; click to read “Leadless SMD packages: great performance on a small surface area.”
About the author
Ralf Euler is currently head of product management for small-signal discrete components at NXP Semiconductors. Previously, Euler was a product marketing manager for diodes and transistors at NXP. He also has several years of experience as a development engineer focusing on bipolar transistors at Philips Semiconductors. Ralf Euler holds a PhD (physics) from the University of Cologne (Germany).
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