In part 1 of this series, we started looking at the differences between the successive approximation register (SAR) ADC and the delta-sigma (Δ-Σ) ADC. We looked at how they work and some advantages and disadvantages of each. Let's move on to some often used configurations with these converters, two of which use the analog multiplexer. These versions create a data acquisition system (DAS) capable of monitoring multiple signal sources (e.g., sensors) with one ADC (and sometimes multiple ADCs).

Multiplexed DASs
As shown in Figures 1-3, multichannel DASs usually employ one of three types of analog signal chains: multiplexing each channel into a single ADC through an amplifier, using individual track and hold amplifiers and multiplexing them in to a single ADC, and using individual ADCs to allow the simultaneous sampling of each channel. Note that when a multiplexer is used, the achievable throughput rate is divided by the number channels that are sampled.

The SAR ADC is typically used in the first case (Figure 1). It can offer significant power, space, and cost savings. The achievable throughput rate is divided by the number of channels being sampled. The channel switching and sequencing must be properly synchronized with the ADC conversion time. In the second case (Figure 2), the achievable throughput rate is again divided by the number of channels being sampled. Individual channels may need low-pass anti-aliasing filters at their inputs. With an amplifier per channel, it is relatively easy to add individually tailored active low-pass filters.

For applications requiring constant monitoring of signals (e.g., signals are rapidly changing or have high-frequency content), a dedicated amplifier and ADC per channel can be used to sample the inputs simultaneously, as shown in Figure 3. This will preserve the phase information at the expense of additional PC board area and power draw.

In this case, system designers can use a single voltage reference in a star point configuration. Individual reference buffers are used for each ADC to provide a low-impedance drive. It's good design practice to keep the track lengths to the individual ADCs about the same length — and as short as is practical. In addition, each ADC REF pin should be individually decoupled with the manufacturer's recommended capacitor value close to the ADC pin.

In the next part of this series, we'll get an overview of the multiplexer and consider the effect that switching across channels has on signal integrity.

Related posts:

• Let’s Compare SAR & Δ-Σ Converters for a Mux’d DAS, Part 1
• Increase Dynamic Range with SAR ADCs Using Oversampling, Part 2
• Increase Dynamic Range With SAR ADCs Using Oversampling, Part 1
• Which Is Better: SAR or Delta-Sigma ADCs?
• ADC Basics, Part 8: A 4-System Matrix With PGA + 12-bit SAR
• Data Converters in Massively Parallel Analog Systems
• ADC Basics, Part 4: Using Delta-Sigma ADCs in Your Design