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Linear regulators – matching the device to the application

Whether it is extreme noise rejection for RF applications, or low quiescent current for keep-alive applications, there is an LDO available to suit. The question is, which one is the right one for your application? Low-dropout linear regulators have many different aspects that can be confusing to the non-analog designer, or any design engineer for that matter. There are several parameters that can affect overall system performance and each one can interact with the others. A good understanding of each parameter helps in deciding where compromises can be made when optimizing the overall system.

The major parameters that affect system performance can be broken down into three major categories: DC performance, AC performance and package. The DC performance category encompasses the actual regulation of the LDO along with ground (quiescent) current and dropout voltage. The output voltage accuracy term seems obvious enough, but there are multiple factors that sum together to form the overall DC accuracy of the LDO. The AC performance category is a sum of all the different AC parameters that directly affect the integrity of the output voltage. And the choice of package is obviously the type of package required for the application. Packaging is clearly an important factor, but by no means an easy parameter to specify.

DC Performance and Accuracy

When specifying an LDO regulator or any type of regulator, specifying the DC performance of the regulator is first and foremost in the design. The key is in understanding the DC requirements of the load being regulated, and then using that understanding of that load to select the appropriate regulator. Whether the load needs high accuracy on the output voltage, or if the headroom, or dropout voltage, of the overall circuit is very low can be deciding factors in which regulator is chosen for the application.

DC accuracy refers to the total deviation in output voltage acceptable for the application. Many processors require fairly tight DC regulation, around 5 percent total. Although not applicable to low power LDOs, networking processors still typically require an absolute maximum tolerance of plus-minus 10 percent including all possible deviations, both DC and AC. This means that the output of the voltage regulator must never go above or below the nominal output voltage by 10 percent. Seems easy enough, however when the total combination of DC and AC accuracy components are combined with losses in the PCB that incur when routing higher currents to the actual supply voltage pins of the ICs are being powered, achieving this level of total accuracy is quite difficult. For mobile applications — especially mobile communications applications such as mobile phones or wireless LAN — the accuracy of the output voltage is critical – more for performance reasons than it is for maintaining the required tolerance of the IC manufacturers.

When optimizing a mobile system for best performance over the operating life of a typical lithium-ion battery, a system designer may find that the system works best at full battery charge (4.2V) with the RF section operating at 3.0V supply voltages. However, the full operating range of a lithium-ion battery is as low as 3.0V, meaning that the RF section must operate at a lower voltage in order to be able to maintain regulation and provide reasonable performance. Most RF sections of mobile phones today regulate at 2.85V and must maintain 3 to 5 percent overall accuracy. The LDO that regulates that voltage should maintain tight initial accuracy of 1 percent with a worst case temperature variation of 2 percent, in order to allow for design margin and prevent the output voltage of the regulator from ever exceeding the maximum tolerance limits for the circuit design.

Two other factors impact the overall accuracy due to DC variations. Line regulation is the measure of output voltage change dependent upon the change of the input supply voltage. For example, in a mobile phone, if the input voltage changes from 4.2V (max charge) to 3.2V (min charge), the output voltage will change because the internal bias settings of the regulator will change. Most regulators have excellent line regulation because the control loops are designed with sufficient gain to correct the output voltage for these variations on the input supply. Some LDO regulators with low loop gain may exhibit poor line regulation as a result of that low loop gain.

The equation for output voltage change relative to the input voltage is:

%Delta V = {[(Vout high ” Vout low)]/(Vout@Vinhigh)}*100

This can also be expressed as a term relative to the change in input voltage. This being for regulators that have a wide input operating range for applications that may operate a nominal 5V or 12V input, but have supply ranges as high as 24V or 28V during surges. The line regulation term can be expressed relative to the absolute change of the input voltage in %/V:

%DeltaV/V = {{[(Vout high ” Vout low)]/(Vout@Vinhigh)}/(Vinhigh ” Vinlow)}*100

Load regulation is a critical term that expresses the output voltage change when the load current changes from one level to another. If the regulator is providing 100 μA and the load changes to150mA, the output voltage will show a DC change with respect to that output current change. This is due to changes in biasing related to the higher current. Once again, the amount of change in the output voltage is virtually directly proportional to the amount of open loop gain in the error amplifier. The more loop gain, the better the loop can correct for small variations on the output. If the loop gain is very low, the output voltage will not correct as much and the deviation in output voltage will be significantly larger. The benefits of higher loop gain are obvious, but the disadvantages of higher loop gain are not as obvious, particularly to the end user. Higher loop gain usually results in a much more complicated design in order to prevent having too much gain at high frequency, resulting in oscillation. There is usually a trade-off when working with such high gain in that the loop isn't as stable as a lower gain loop that may have worse performance. Achieving the right balance between loop gain and stability is critical when design a high performance LDO for applications such as RF power supplies.

The load regulation is typically expressed in two forms, an absolute percentage change specified over a fixed current range, or in a percent per milliamp term which expresses the amount of output voltage change to be expected per milliamp.

%Delta V = [(Vout max load ” Vout min load )/(Vout min load )] * 100

or

%Delta V/mA = {[(Vout max load ” Vout min load )/(Vout min load )]/(Iout max Iout min )} * 100

The total DC accuracy can be seen as a sum of the parts.

The MIC5305 is an example of a regulator that has excellent regulation characteristics and it can achieve extremely high levels of accuracy. Figure 1 shows the breakdown of its total accuracy into the sum of the three parts, initial and over temperature accuracy with load regulation and line regulation. Most regulators have load regulation such that when the load increases the output voltage goes down, so the load regulation term will almost exclusively pull the output voltage down from whatever nominal voltage it is regulating to. But most manufacturers specify it in both directions, so the example shows both positive and negative load regulation.


Figure 1. Total DC accuracy of an LDO can be seen as a sum of the parts including load and line regulation, as well as variations over temperature.



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Dropout Voltage and Ground Current

Dropout voltage is defined as the minimum voltage required between output and input voltage in order to keep the LDO in proper regulation. With the majority of low dropout regulators, the pass transistor is a PNP bipolar transistor or a P-channel MOSFET. The PNP pass transistors have a dropout voltage defined by the Vce (collector-emitter voltage) saturation characteristics. Most PNP LDOs will saturate at their maximum designed output currents with a dropout voltage (saturation voltage) of 200 to 300mV. The P-channel MOSFET equivalent LDOs have a dropout voltage dependent upon the Rds(on) of the P-channel device. This is a bit harder to specify because now the dropout is dependent upon the channel resistance of the PMOS transistor which, in turn, is directly proportional to the gate-to-source voltage. In virtually all PMOS LDOs, the gate-to-source voltage is essentially the input voltage to ground. The source of the PMOS device is always the input voltage and in order to fully enhance the PMOS device, the gate has to be driven as close as possible to ground. Therefore, the maximum Vgs of the PMOS device is defined by the differential ground ” input voltage. The dropout voltage of the PMOS-based LDO regulator will vary directly with the input voltage.

One advantage the PMOS regulators have is that the process technology for PMOS transistors is much smaller than the closest PNP equivalent and very low Rds(on) values are achievable in very small areas. Therefore, a very low dropout voltage can be achieved within a reasonable silicon area with PMOS where the PNP device would have to be significantly larger.

The benefit of lower dropout voltage in a mobile system is that a much lower input voltage is required to maintain the same level of performance on the output. For example, if the dropout voltage at 150mA of output current is 300mV, then the minimum required input voltage to maintain regulation of a 3.0V output at 150mA of output current is 3.3V. But, this is where the pass transistor (PNP or PMOS) is fully on and the loop has lost most of its characteristics and now appears to be a linear switch – all noise on the input will pass straight through to the output. If the input drops below 3.3V, the output voltage will track the input voltage minus the drop of the dropout voltage. In order to maintain good performance, the regulator needs some additional headroom on top of the dropout voltage to keep the pass transistor in a region where it can reject input noise and respond to input and output transients.

Ground current is the measure of current required by the LDO to function. It typically includes all bias currents required by the LDO and any drive current for the pass transistor. Ground current is the only parameter that is directly affected by the choice of pass transistor. The main characteristic in choosing a PNP transistor for the output device of a linear regulator is its gain characteristics, or beta. The beta factor for a PNP pass transistor determines the amount of current required to drive the base of the PNP while supplying load current. If the beta is around 100, the base current (or ground current in an LDO) for a 100mA load will be 1mA. Therefore, the overall ground current of the LDO will be the sum of the bias current plus the base current. In a PMOS based LDO, the pass transistor is voltage controlled and doesn't have the same current requirements the PNP. Therefore, the current at no load could be equal to the current at full load because there is no requirement to drive the gate of the PNP with current, only voltage. Therefore, PMOS based LDOs have lower ground current at full load compared to the PNP based LDOs.

The bias current (independent of technology) is usually proportional to performance. A very low bias current LDO will usually have lower loop gain and therefore worse accuracy. They typically also have worse AC performance for parameters such as power supply ripple rejection, transient response and self noise.

AC Performance

There are many AC parameters that affect the system performance. The three major parameters that dominate the system performance for mobile applications are transient response, power supply ripple rejection and self noise. The other major AC parameter which is not be discussed here – but which is equally as critical – is loop stability. Without a stable operating loop, all the other parameters are unimportant.

Power supply ripple rejection, or PSRR, is a measure of the regulator's ability to reject input noise at a specific frequency. It is a measure relative to frequency and it is always expressed in dB. The basic equation for PSRR is as follows:

PSRR(dB) = 20log (Vout /Vin )

Where Vout and Vin are DC voltages measured at a specific frequency. The importance of this parameter in a battery-powered application may not be obvious. Batteries give an ideal voltage source when there are no perturbations in that voltage source. Lithium-ion batteries have a reasonable amount of output impedance compared to other battery technology and the output voltage will actually show a large variation based on the current drawn from that battery. In GSM (Global System for Mobile Communications), the transmit and receive cycles in the RF draw a huge amount of current from the battery, causing a large change in voltage on the output of the battery. That change in voltage is seen throughout the system and on the inputs to all of the regulators in the system. The regulators powering noise sensitive circuits such as the RF chipsets must be able to reject that large change in supply voltage so that the RF circuitry doesn't modulate that noise into the RF output and cause interference between adjacent operating channels, or users (Figure 2 ” MIC5305 PSRR).


Figure 2. With the right amount of power supply rejection ratio (PSRR), LDOs are suitable for RF applications like GSM cell phones.



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With the right amount of PSRR, this interference can be prevented and the RF section will function without problems. One additional issue when designing with a lithium-ion battery system is that the usable range of the battery is between 3.0V and 4.2V and the output impedance of that battery goes up when the voltage drops and at low temperatures. What that means is that at low supply voltages and cold temperatures, the changes in the output voltage of the battery, with the same change in current caused by the actual transmission of data through the power amplifier of a GSM system, will be much larger. With the same PSRR level, the output of the regulator will have more noise than at nominal battery voltage and nominal temperature. The necessary PSRR level required to maintain good RF sensitivity under extreme conditions is very high. For this type of application, attention must be paid to the PSRR specification of the LDO under all possible conditions to make sure that the proper LDO is being selected for the application.

Transient Response

All power supplies take some finite amount of time to respond to changes. Just like we humans take time to respond to stimuli, regulators take time to realize what is happening and react. When the input voltage to a regulator is suddenly changed, the output voltage will start to move because, virtually instantaneously, all of its bias points and steady state conditions have changed. As a consequence of these changes, the output will start to change as well. The transient response of the regulator determines the amount of time it takes for the LDO to realize that its output has changed combined with the amount of time it takes the LDO to start pulling the output back into nominal regulation. This factor depends on many different design criteria such as bias currents and slew rates of amplifiers, as well as the amount of output capacitance the loop is designed to work with. The more output capacitance, the less voltage change the output of the regulator will see. Likewise for a change in output current. When the output of the regulator sees a large change in output current, the output capacitor discharges until the regulator reacts to the changing current and voltage on the output and pulls the output back into regulation.

Figure 3 (Load Transient Response Analysis) shows a breakdown of the contributions of the output capacitor to the load transient response along with the contribution of the output capacitor in analyzing that output transient response. The analysis of the output voltage during a transient response, gives an exaggerated view of the output voltage during a current transition from a light load to a heavy load. First, the output voltage will change by the instantaneous current change times the ESR (equivalent series resistor) of the output capacitor. The larger the change in current (di) and/or the larger the ESR of the output capacitor, the larger the instantaneous droop across the output capacitor.


Figure 3. Load Transient Response Analysis shows the voltage drop that comes in response to a current step.



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This is effectively the only limitation in the output capacitor supplying current to the output load. If the change in output current occurs at a significantly high slew rate (or small change in time dt), then the drop in the output capacitor due to the ESR will be larger as the output capacitor's ESR varies with frequency. The loop response of the regulator can be noted when responding to a load change by noting the voltage droop on the output and the time it takes for the droop to start correcting. Analyzing the load transient response will give a fairly accurate estimate of the large signal bandwidth of the loop.

In order to achieve wide large signal bandwidth, the regulator will have to consume a significant amount of current itself in order to broadband the amplifiers as well as giving the loop significant slew rate capability. Normally, when designing a low power regulator, the currents scale down significantly and the load transient response scales down as well. The images in Figures 4a (MIC5305 Load Transient Response) and 4b (MIC5235 Load Transient Response) show the transient response of a 150mA regulator with 90μA of quiescent current (MIC5305) vs. the transient response of a 150mA regulator with 18μA of quiescent current (MIC5235). The 18μA regulator has a significant amount of output capacitance and it still has more voltage droop because it requires a significantly larger amount of time to respond to load changes. The MIC5305 regulator has a significantly faster transient response and has less voltage droop even though the output capacitor is a lower value than that of the MIC5235.


Figure 4. The transient load response of the MIC5235 (top) is slower than the MIC5305 (bottom). Because of its capacitance, the 18μA takes a significantly larger amount of time to respond to load changes.



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Self-Noise

Self-noise is the measurement of noise on the output that is generated by the LDO itself. This is an important parameter in the RF section of mobile phones, especially when circuits like voltage-controlled oscillators (VCO) are driven separately. The VCO will operate at a much higher level of performance if the LDO powering that circuit has high PSRR and low self-noise.

Self noise is a very difficult measurement to ascertain, but still merits a discussion of the important factors. The topic of measurement of self-noise is too long to discuss in full here. That being said, self-noise can be quantified in two different ways. Spectral noise measurement quantifies noise at a specific frequency and it is measured in V/rtHz. This gives the specific quantity of noise when measured at a specific frequency. Normally, this is plotted over a large frequency range to show the contribution of noise over different frequencies. (Figure 5)


Figure 5. Noise is plotted over a large frequency range to show the contribution of noise over different frequencies.



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Many people are accustomed to speaking of noise in μVrms . This gives a fixed noise output when specified within a specific bandwidth. Referring to Figure 5, the curve represents noise over many different frequencies. If the aforementioned graph is then cut into a block of frequencies, say between 10Hz and 100kHz, then integrated that portion of the curve over that fixed bandwidth, the output of that integration will give a μVrms term. This gives a simplified way of looking at output noise in a system. This can be misleading though, as many manufacturers of low noise LDOs limit the bandwidth of their measurement in order to make the μVrms number low. For example, if the spectral noise measurement peaks up at frequencies lower than 100Hz (very common due to white noise contributions), then removing that portion of the bandwidth from the measurement of the RMS noise would give a lower RMS number. Therefore, designers will see on many datasheets of LDOs that the RMS number is fixed at a bandwidth from 100Hz to 100kHz, or even 300Hz to 50kHz. This is a way of masking true noise output. The industry standard bandwidth for noise quantification is 10Hz to 100kHz, and Micrel LDOs follow this convention.

When considering an LDO, it is important to look at the noise spectrum. This parameter will tell more specifically where the LDO could cause problems relative to noise. If the noise is much greater than 1μV/rt Hz at any point, then at that point, there may be problems in a system with noise. If the noise rolls off quickly from 1uV/rt Hz after 10Hz, then the overall output noise will be low. It is when the output noise of the LDO either doesn't roll off, or rolls off at a higher frequency, say at 1kHz-10kHz, then that noise may become a problem. The key is to have the spectral noise density around 100nV/rt Hz by 1kHz in order to keep the noise from creating problems in the RF circuitry.

While the self-noise specification of an LDO is important, it becomes useless; the LDO has high PSRR. For example, if an LDO has measured self noise of 20uVrms, but the PSRR is only 50dB, then 100mV of input noise would show up on the output of the LDO as 316μV. This noise would sum with the self noise of the output to create 336μV of output noise. In this case, having such low output noise does not benefit the end user. Having low output noise is critical when: 1) either the input noise is very low to begin with and the output is very sensitive; or 2) when the PSRR is very high (>70dB) and the input noise gets rejected to the point when the self-noise becomes a significant contributor to the overall output noise of the system.

Packaging

When selecting a linear regulator for any application, whether it be mobile power management which is characterized typically by lower power applications or consumer applications such as set-top boxes where higher currents and therefore higher power dissipation is acceptable, the packaging technology chosen is going to be radically different. From uCSP (micro chip scale packaging), which allows package sizes proportional to the actual die size, to S-Pak power packaging, the options for packaging available today are immense. In order to focus on a particular area, mobile products will be the main focus and the discussion with respect to packaging will revolve around the evolution of packaging from small outline plastic packaging to wafer level CSP packaging and what is the right package for the application.

When designing with a linear regulator in a mobile application, care must be taken that the appropriate regulator be designed into the appropriate application. For example, if the input voltage of the regulator is 3V to 4.2V (typical lithium-ion battery) and the output voltage is 1.5V with required output currents varying between 100mA and 300mA, more than likely an LDO regulator will not be the ideal choice for the application due to the relatively large differential input-output voltage. Mobile applications require significant power savings due to the fact that they are powered from batteries and, as a result, need to maintain higher efficiencies in order to increase the operating time of the portable device.

Therefore, for that particular example, a high efficiency switchmode converter such as a switching regulator would be the ideal choice. But in many mobile products, there still exist several linear regulators providing voltages from 3.3V down to 1.8V from a single lithium-ion battery. If two different applications are analyzed for mobile phones, we can analyze which package would be best from a performance standpoint. First example, the RF section of a mobile phone usually requires a 2.7V to 3.0V output regulator. The input supply of that regulator is the typical lithium-ion battery, meaning that the maximum voltage applied to the regulator will be 4.2V. The currents usually drawn in the RF section vary from as low as 20mA to as high as 150mA. Therefore, the worst case for power dissipation requirements can be broken down as follows:

Vin = 4.2V; Vout = 2.7V; Iout = 150mA;

To calculate power dissipation in a linear regulator, the following formula is used:

Pd = (vin ” vout )*Iout + Vin *Ignd

In linear regulators where the ground current is less than 1 percent of the output current and the input voltage is less than 5V, the ground current term becomes insignificant and can be ignored when calculating maximum power dissipation. For the RF example, the power dissipation is as follows:

Pd = (4.2V ” 2.7V)*150mA
Pd = 225mW

Most packages designed for the RF applications are designed to dissipate 400 to 500mW of power dissipation.


Table 1. PCB Area and Thermal Resistance by Package.



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shows a breakdown of the three different package types used for RF power management in mobile phones. The most common is the SOT-23-5. This package is a standard surface mount package, occupying about 3mm x 3mm of PCB area and has a thermal resistance of about 235C/W. This would give about 425mW of power dissipation at room temperature and 230mW of power dissipation at an ambient temperature of about 70C.

One relatively new package available in the market today is the MLF 2mm x 2mm package which occupies less than half the space of the SOT-23 and has significantly lower thermal resistance due to its backside thermal slug pad, about 93C/W. This means that for an equivalent application, the MLF package occupies significantly less space and requires less heatsinking even though it occupies the less space. It is a package that dissipates its own heat more efficiently and relies less on the outside world to do so for it. For the RF application, the SOT-23-5 barely meets the required power dissipation and becomes very hot. If the junction temperature of the SOT-23 die is analyzed under worse case conditions and compared to the MLF product under worst case conditions, then one can see a big difference in die temperature. To calculate junction temperature one would use the following equation:

Pd = (tj ” ta)/theta JA
Tj = (Pd * theta JA) + ta

For the case of the SOT-23 at worst case ambient temperatures of 70C, the junction temperature would be:

Tj = (225mW * 235C/W) + 70C
Tj = 122.9C

For the case of the MLF-2×2 package, the junction temperature is as follows for the equivalent application:

Tj = (225mW * 93C/W) + 70C
Tj = 90.9C

The MLF product runs 30C cooler at the die than the SOT product. The benefits of this are not obvious at first, but when one analyzes the contributions of temperature in CMOS regulators, one can see that at high temperature the dropout voltage goes up. The P-channel transistors, most commonly used in CMOS regulators, have a positive temperature coefficient of resistance meaning the channel impedance increases as the temperature increases. Meaning the dropout voltage increase linearly with temperature. With an equivalent input voltage, the regulator with the cooler die temperature will have more headroom in comparison with the hotter regulator and all the performance parameters will be better.

The newest technology available to linear regulators for packaging is wafer level technology. Figure 6 shows the evolution of packaging with time and the on-set of miniaturized packaging last year with overall market acceptance of this package occurring in 2004.


Figure 6. The evolution of miniaturized packaging.



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The CSP package is a package ideal only for extremely space-constrained applications for several reasons. A die that fits into a SOT-23-5 will typically be a CSP package of 1mm x 1.4mm. This is a tiny final product but the thermal resistance of this product is actually higher than the SOT-23-5. This means that CSP actually runs hotter under worse-case conditions and is actually limited in the amount of power dissipation it can handle for portable type applications. It is also a more expensive technology due to the intense requirements for testing that today are easily handled with SO and MLF technologies. But, with an area that occupies less than one-quarter of a SOT and less than half of an MLF 2×2, it represents a compelling technology.

Only a small portion of the market is working with CSP technology due mainly to challenges with working with such small packaging during the reflow process. Other companies are avoiding the technology due to price. The CSP technology demands a premium over the standard SO package and many companies are not willing to pay the premium. With time, the pricing of chipscale relative to the rest of standard packaging should fall in line, but today and for the foreseeable future, CSP will be a more expensive alternative to its plastic relatives.

Choosing the Right Part for the Application

After considering all the different aspects of a linear regulator for the application, which features are important for which applications and what is a reasonable trade-off when considering performance? The best way to approach this is by reviewing the application. A few key questions will help to eliminate some features while pointing out which features are important. Key questions to ask are:

    1. Does the regulator need to be on all the time?
    2. Does the regulator power a noise-sensitive circuit like RF or digital circuitry that is not noise sensitive?
    3. What is the maximum input voltage and what is the minimum output voltage required for the application? What is the maximum current?
    4. How much space is available for the application?

Going through these questions, the answer to question 1 will determine whether or not the regulator needs to be a low quiescent current regulator, and/or if it requires a shutdown (enable) pin. In most mobile phones, there is some portion of the circuit that remains alive all the time. Typically the baseband processor will remain awake, but in a very low power state that consumes 100μA or less. In this mode, the regulator that provides the power management for the processor will need to draw significantly less current than it provides to the processor to make the conversion process efficient enough to maintain battery life.

Many times, there are multiple voltages required for the processor, i.e. the core voltage and the I/O voltage. A dual regulator, with low quiescent current, is ideal for this application as it can apply the bias voltages required without consuming an excessive amount of current for the applications. An example of this type of regulator is Micrel's MIC2212 which integrates two low quiescent current regulators and a power-on reset voltage supervisor that provides a complete power management solution for a baseband processor. The MIC2212 only consumes 48μA total quiescent current, compared with 200μA which two standard LDO regulators would consume under the same conditions, resulting in over a 75 percent savings in current which dramatically increase standby battery time in a cellular phone, for example.

For the second question, if the application is RF, the noise performance of the circuit will be critical as well as accuracy of the regulator. The output of the regulator when compared to the input voltage of the regulator will have to be very low noise. The output noise is comprised of three terms that are additive: 1) the output self-noise of the regulator, 2) PSRR and 3) load transient response. Ideally, the part would be low noise, high PSRR and have fast transient response. This is very difficult, if not impossible to do with low quiescent current, but for RF, the application is always either on or off, so the quiescent current is not critical. A product such as the MIC5305 is an example of a low noise regulator with high PSRR and fast transient response to give the lowest composite output noise available in the market. It consumes about 90μA of quiescent current, which, in comparison with low quiescent current LDOs, is about three times the amount of current, therby providing much better PSRR and output noise.

The accuracy affects circuits in the RF section such as the VCO which prefers a stable, very low noise voltage source for the power supply. Accuracy can also be critical in powering the ICs in the RF section responsible for the transmit and receive portions of the RF section. Regulators such as the MIC5305 need to be high accuracy in order to provide the stable, very low noise output voltages required by high performance RF circuitry.

Answers to the third and fourth questions will tell you directly how much power dissipation needs to be handled by the application and which package is appropriate based on the power dissipation and space available. In the baseband section of a cellular phone, where voltages can drop below 2.8V – even as low as 1.8V for linear regulator applications – the power dissipation required is critical. More than likely, a CSP-type regulator will not be applicable in the baseband because the power dissipation required during operation would exceed the capability of the CSP package. In those moments, the MLF type package provides the ideal mix of size and power dissipation capability. Referring back to the thermal performance section above will help determine the proper package for the application.

LDO linear regulators will continue to play an important part in the evolving mobile phone market. As 3G technology or beyond begins to take hold in the marketplace, the mobile handsets will be more feature-rich, offering on-demand video clips, more image storage, etc. This added functionality increases the digital complexity required in the mobile handset itself, which will, in turn, increase the amount of power management required. The proper choice of the voltage regulator required for the application will make the handsets function better and longer, optimizing system performance and current draw for the application.

1 comment on “Linear regulators – matching the device to the application

  1. ljoijdsofe
    July 29, 2015

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    It is important to note that any presence you have on the Internet – whether for your business or personal life – lasts forever and can easily find its way to your potential clients. Therefore, it is judicious to work toward a professional image both in and out of your real estate career.

    Utilizing Tools and Technology
    Going hand-in-hand with developing a professional image is utilizing tools and technology. Today's agents can use a number of tools to help organize and promote their real estate businesses, including:

    Contact Management
    Keeping track of your clients is a must. You can go basic with a spreadsheet program or an email database program such as Outlook's, or you can invest in database software designed specifically for real estate professionals. Commercial products offer a number of useful features, including automated contact synchronization to your smart phone. No matter how you keep track of your contacts, keep the list current – updating, adding and deleting contacts as appropriate.

    Agent Web Sites
    Consider setting up your own domain name and Web site. While this may seem daunting to some, it is easier than ever to build a professional looking Web site. While large corporations may spend hundreds of thousands, or even millions of dollars, developing and maintaining their Web sites, you can do it for a very small financial investment.

    A Web site provides you with a “landing page” to direct your existing and potential clients to, while creating a professional, searchable Web presence. It is possible to have individual property Web sites to promote your listings and keep your sellers happy. You can also take advantage of social media by linking to your Facebook, Twitter and LinkedIn profiles (and any other social media platforms).

    Marketing
    Real estate agent marketing software can help you manage your marketing efforts. These packages typically include templates for business cards, door hangars, postcards, property flyers, brochures, email campaigns and animated home tours to help you efficiently reach out to existing and potential clients.

    Apps
    A number of apps for iPhone and Android-based devices are available to help you stay connected while you are outside the office. The House Hunter app, for example, allows agents to track and compare an unlimited number of homes, using a proprietary scoring method to identify houses that best match your clients' requirements. Open Home Pro allows you to run an open house on your iPad, follow up with leads, create listing pages and export collected data to Excel or other software.

    The Bottom Line
    Working as a real estate agent has its challenges: you don't get paid unless you sell, you can work long hours and still have no paycheck, and you have to adapt to changing market conditions. That said, it can be a rewarding career, both financially and professionally. Calling on your sphere of influence, projecting a professional image and utilizing today's real estate tools and technology can help you develop a successful career in real estate.

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