Most of the well-known semiconductor companies have chopper amplifiers in their portfolios. The chopper is a device that modulates the input signal with a carrier with a chop frequency (fchop ) of perhaps a few hundred kHz. The input signal is probably DC or low-frequency AC. The chopped signal is amplified (probably a lot) with an AC amplifier. The resulting signal is demodulated. This yields amplification of the input signal without the pesky DC artifacts caused by DC offset (or DC offset drift) errors that plague typical high-gain, general-purpose op-amps.
Today's choppers show much improvement over devices from just a few years ago. But there is always room for better specs. A recent IEEE/ISSCC paper (registration required) describes a way to get not only low offset voltage (3μV) but also a very wide input common mode voltage range (CMVR). They also solved another annoying problem:
A significant drawback of such [chopper] amplifiers is a transfer-function notch around [fchop ]. This is because their input choppers demodulate signals near fchop to DC, where they are blocked by [coupling] capacitors. This problem is exacerbated by the use of a ripple-reduction loop (RRL) to suppress chopper ripple, which also creates a notch at fchop , and, moreover, can take up to 1ms to settle. The net result is an amplifier with a transfer-function notch and a step response that is accompanied by a slowly decaying burst of chopper ripple.
To fix these problems, the authors propose “a multi-path capacitively-coupled chopper-stabilized operational amplifier (MCCOPA).” The proposed circuitry should produce a 20V CMVR and a common mode rejection ratio (CMRR) of 148dB.
The architecture consists of high- and low-frequency paths. The high frequency path (HFP) is a simple AC-coupled amplifier (gain of 14μS) feeding the output stage (a Miller integrator). Its inputs are capacitively coupled, of course, so DC offset doesn't matter. The low-frequency path (LFP) consists of a chopper cell, AC coupling, an amplifier stage, another chopper cell acting as the demodulator, and some additional gain stages. The signal from this path is combined with the AC-coupled signal in that same Miller integrator stage.
There is an additional side chain around the DC amplifier stage that feeds back a small portion of the signal via another chopper cell. This is the RRL. It reduces the residual amount of chopper-induced ripple in the output of the amplifier.
Here is the block diagram showing these three signal paths (high, low, and RRL).
And here's a detailed view of how that is squeezed on to the chip.
The authors also explain how their design works to suppress 1/f noise. The crossover frequency (the breakpoint between the HFP and the LFP) is above the corner of the 1/f noise. The 1/f noise in the LFP is suppressed by the HFP, and the noise in the HFP is suppressed by the LFP. Thermal noise caused by the large value resistors is similarly suppressed.
The specs at a glance:
- The CMVR is -0.6V to +20V (limited by ESD diodes and input pads).
- The input offset voltage (based on 14 samples) is less than 3μV.
- The input bias current is less than 107pA.
- The input offset current is less then 95pA.
- The PSRR is more than 120dB.
- The CMRR is more than 148dB.
- The fchop value (input-referred residual ripple, AV =100V/V) is 125nV (mean amplitude) and 280nV (peak amplitude).
- The input-referred noise density is 55nV/√Hz and is flat down to ~1Hz.
- The power supply current draw is 8μA @ 5V.
- This device is fabricated on a 0.7μm CMOS process, with a chip area of 1.35mm2 .
Here's a better view of the noise and the frequency response. On the left, we have output noise spectrum density at a gain of 95V/V. On the right, we have frequency response with and without the multipath architecture described above. The gain is 22V/V; CL is 40pF.
And this look at the step response under a variety of conditions should provide everything you need to know about its slew rate.
Lastly, here's a comparison with several other recently designed devices that showed up in other IEEE/ISSCC papers.
Have you used ultra-low offset op-amps, chopper or otherwise? What was the design experience like? Did the devices perform as expected? Did they meet your requirements?