In the first part of this series on switched capacitor bandgap references, Low Power Switched Cap Bandgap, the basic operation of an implementation using this technique was explained. In this installment, an error analysis is done on a traditional bandgap circuit and is then followed by an explanation of how these errors can be minimized using a switched cap circuit. Figure 1 shows a traditional bandgap reference implementation and its associated error sources.
The bandgap voltage of Figure 1 without the error sources is described by the equation below.
The error sources are added below with the assumption that all mismatch (∆) errors are < 1%, this allows for much simplification of the math. Only one transistor (Q1) has a mismatch term as its variation will dominate the emitter area ratio (N) mismatch since it is the smaller of the two transistors.
Conditions, error levels and chosen design parameters:
Error calculations using the parameters above:
As can be seen above the input offset voltage is the major error source so eliminating this error will go a long ways toward an accurate bandgap voltage. So let’s move on to the switched capacitor implementation and see how this error is handled, as well as how the other errors compare.
In Figure 2, the switched cap bandgap circuit is shown with a simple addition (labeled “new”) to perform offset voltage cancellation. This figure is a modification of the initial sampling state, Figure 1 from the first part of this series. In this state, the feedback capacitors C´´ are now both connected on one side to the common mode output voltage (vcm) and the other sides are connected to the inputs of the OTA, as are the rest of the capacitors in the circuit. Hence, the input offset voltage is sampled on all caps in this phase.
In the next state, φ1 switches open and φ2 closed, the terminals of the two C´´ feedback capacitors that were previously connect to vcm are connected to the outputs. Both retain the same terminal voltages, and hence the OTA offset voltage has been eliminated from the differential output.
The second largest error contributor in the traditional bandgap circuit is the mismatch between R0 and R1 . These resistors are used to gain up (R0 / R1 ) the PTAT voltage. As described in the first part of this series, the PTAT voltage is gained up in the switched cap circuit using a capacitor ratio (2C´/C´´) instead of a resistor ratio. This is beneficial as the mismatch of capacitors (per unit area) is much less than the mismatch of poly resistors, ∼5X difference in the process I am presently working in. This reduces the second largest error from 6.3mV to 1.3mV .
One last benefit of this switched cap architecture is the superior power supply rejection (PSR) performance that comes from the differential nature of the circuit. The symmetrical design of the differential OTA provides first order cancellation of signals riding on the power supply.
In conclusion, the use of switched capacitor techniques for generating bandgap based voltages has many benefits. Among these is the ease of reducing or even eliminating the errors common to many traditional bandgap circuits. Offset voltage errors are eliminated using a simple offset cancellation technique, mismatch errors of critical components are reduced using capacitors instead of resistors, and better PSR performance is obtained by the differential nature of the circuit. These benefits are in addition to those highlighted in the first part of this series, which included low operating power, flexible output voltage scaling, and compatibility with other switched capacitor circuits. The tradeoff for all these benefits is a modest increase in the complexity of the circuitry which I have found to be well worth the extra effort.