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Maximizing Zero Drift Amplifier Signal Integrity

Zero-drift operational amplifiers have proven to be valuable problem solvers due to their low input offset voltage and minimal input offset voltage drift. Rail-to-rail input versions of these specialized op amps also show significant benefit compared to their non-zero-drift companions by dramatically reducing the effect of the input stage crossover region between the PMOS and NMOS input pairs. Offset and offset drift performance near the limits of the common-mode voltage is excellent, which is why they are often used for applications such as high side current sensing.

Like all engineering solutions, zero-drift op amps also have their limitations. One of the less obvious is a result of the fact that the internal circuit contains a clocked system; a simplified block diagram of the ON Semiconductor NCS333 is shown in Figure 1. While some might debate that this type of chopping is a real-time system, practice has shown that it is susceptible to classic sampling system problems of aliasing or heterodyning. The main artifact from chopper-stabilized op amps occurs when a signal nears the clock frequency of the chopper. In this application note, we will use the word aliasing, but that will encompass what is probably more appropriately called heterodyning.

Figure 1

Simplified block diagram of the ON Semiconductor NCS333 zero-drift chopper stabilized amplifier

Simplified block diagram of the ON Semiconductor NCS333 zero-drift chopper stabilized amplifier

There are datasheets for zero-drift amplifiers stating that they are free from aliasing. We may be able to assume that the manufacturer made an effort to measure any possible aliasing and found none. In the development of zero-drift amplifiers here at ON Semiconductor, initial measurements on competitive amplifiers gave them a clean bill of health. At the time, clock artifacts in the output of the competitor's devices were not found. Further testing has shown that aliasing can still be found on these devices using a simple technique.

Discovering and Testing Aliasing

Aliasing was found to be an issue when customers had problems with systems using zero-drift op amps from several manufacturers. In these cases, there was a common theme where the signal of interest, a low frequency or DC signal, had high amplitude, high-frequency interference or ripple signals superimposed. The result on the end system varied, including closed loop systems stabilizing at incorrect conditions and systems unable to report a correct signal.

Past efforts to discover aliasing involved the use of sophisticated spectral and network analysis systems that provided inconclusive results. To take a more fundamental approach, an oscilloscope was connected to the amplifier output for direct visual observation. For input stimulation we would sweep a generator around where we expected the clock frequency to be (and beyond that if necessary) to see if we could induce a “beat frequency” output. This method worked surprisingly well, considering that our initial effort was with a gain of +1 configuration, shown in Figure 2, arguably one of the most linear op-amp configurations.

Our first op-amp chosen was the ON Semiconductor NCS325 which is an auto-zero technology amplifier, as opposed to chopper-stabilized like the other devices tested. In theory, an auto-zero architecture will exhibit more dramatic aliasing than a chopper-stabilized type which made it our first choice to validate our test. Figure 3 depicts the aliasing of the NCS325. Measuring our own amplifier first made validating these tests easy as we had an excellent idea what the clock frequency was.

Figure 2

The test circuit to detect aliasing is a simple unity gain buffer. Essential to the technique is viewing the device output on an oscilloscope. It seems that spectrum and network analyzers don't always detect signals related to the internal workings of zero drift amplifiers.

The test circuit to detect aliasing is a simple unity gain buffer. Essential to the technique is viewing the device output on an oscilloscope. It seems that spectrum and network analyzers don't always detect signals related to the internal workings of zero drift amplifiers.

Figure 3

Aliasing output of the first amplifier tested, the ON Semiconductor NCS325 in a simple +1 V/V buffer. The upper blue trace is the input signal, the lower trace is the aliasing seen at the amplifier output, or heterodyne, whichever one prefers to call it.

Aliasing output of the first amplifier tested, the ON Semiconductor NCS325 in a simple +1 V/V buffer. The upper blue trace is the input signal, the lower trace is the aliasing seen at the amplifier output, or heterodyne, whichever one prefers to call it.

It is important to remember at this point; aliasing is not a defect of sampling amplifiers, it is a behavior. Knowledge of this behavior and how to avoid it can make zero-drift amplifiers operate at their best.

After checking the NCS325, we tested a chopper stabilized op-amp, the ON Semiconductor NCS333. An interesting result occurred here, the only noticeable aliasing we could find occurred at twice the clock frequency. Which points out that performing this test to discover aliasing may require sweeping around the bandwidth of the amplifier to detect these signals. Figure 4 depicts the aliasing signal from the NCS333.

Figure 4

NCS333 chopper-stabilized zero-drift op amp aliasing. The aliasing was expected to occur near the clock frequency but despite our best efforts it didn't occur. Nonetheless aliasing did occur at the second harmonic of the clock frequency.

NCS333 chopper-stabilized zero-drift op amp aliasing. The aliasing was expected to occur near the clock frequency but despite our best efforts it didn't occur. Nonetheless aliasing did occur at the second harmonic of the clock frequency.

A competitive zero-drift chopper-stabilized amplifier was also tested for aliasing. This popular amplifier’s datasheet states it has no aliasing. However, Figure 5 depicts aliasing at approximately the fundamental frequency of the internal clock. For this amplifier, previous extensive testing with spectrum and network analyzers could not uncover evidence of the clock or its frequency.

Figure 5

Brand-X chopper-stabilized zero-drift op amp aliasing. The datasheet for this device claims there is no aliasing.

Brand-X chopper-stabilized zero-drift op amp aliasing. The datasheet for this device claims there is no aliasing.

Systems Susceptible to Aliasing

Systems where the signal of interest is accompanied by high frequency coupling of stray signals or large high frequency ripple are vulnerable. The result can include merely delivering incorrect or noisy values, or control loops settling on wrong operating points.

According to the Nyquist sampling theorem, the zero-drift clock should be at least twice the maximum frequency component of the signal of interest. In other words, the maximum frequency of the input signal should be less than or equal to half of the amplifiers internal clock.

How do you ensure that this Nyquist sampling theory is being adhered to? It's easy enough to establish an upper limit for signal frequency (fS < fCLK /2), but pickup from stray signals, noise, or ripple could contain frequencies higher than the Nyquist frequency. These frequencies may then alias into the appropriate frequency range resulting in malfunction or incorrect readings.

To be sure that the frequency content of the input signal is limited to the usable frequency range, use a low pass filter before the amplifier. This filter is an anti-alias filter. By attenuating the higher frequencies (higher than the Nyquist frequency), it reduces or eliminates the aliasing effect. The anti-aliasing filtering must be pure analog filtering before the amplifier. Often a simple RC filter will suffice.

Elaborate and fancy filter architectures should rarely be necessary. Do not configure the amplifier as part of the filter in an active filter circuit.

Figure 6

A simple two-section R-C filter seems crude in today's world of active filters. The filter must be placed ahead of the amplifier.

A simple two-section R-C filter seems crude in today's world of active filters. The filter must be placed ahead of the amplifier.

Some Additional Notes on Zero-Drift Amplifier Aliasing

Don't turn to SPICE simulation for any enlightenment on how zero-drift amplifiers will behave with regard to aliasing. All SPICE models of zero-drift amplifiers are continuous-time models. They are designed to model as closely as possible the linear performance of the op-amp. They are continuous time because clocked and sampled systems simulate much slower.

It seems that many zero-drift amplifier datasheets provide no information on the internal clock frequency. Sometimes they mention it in a paragraph in their application section; occasionally you can find a perturbation on a noise or bandwidth plot that may suggest what the clock frequency may be. As a consequence, you will often be left to test your circuit for susceptibility to aliasing. Our method as shown here was very simple: time domain testing while viewing an oscilloscope. Sweep the amplifier input over a range of frequencies up to the gain-bandwidth product. The internal clock frequencies of all known zero-drift amplifiers are, to this author's knowledge, within the gain-bandwidth of the amplifier, often at roughly a third of the gain-bandwidth. These amplifiers are going to be at their best at signal bandwidths less than that point.

References

Walt Jung Op Amp Applications Handbook pp 92-93

Auto-zero amplifiers ease the design of high-precision circuits, Thomas Kugelstadt, Texas Instruments

Demystifying Auto-Zero Amplifiers—Part 1, Eric Nolan, Analog Devices

1 comment on “Maximizing Zero Drift Amplifier Signal Integrity

  1. StephenGiderson
    July 18, 2018

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