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ernie.hanks
ernie.hanks
11/14/2013 6:24:38 PM
User Rank
Newbie
Simulating Ground Noise
Bruce!

Great topic and convenient timing! Being one who's relatively new out of school I understand your claim that the term "ground" coming from the academic world; I was always taught ground is 0 Volts. That is until I suffered from my first painful groundloop when making low-noise measurements at work 3months ago; specifically trying to measure nA currents with mA currents also flowing on the same PCB.


Do you have any experience simulating these ground noise problems? I've come up with a very interesting graduate project (as I'm currently finishing a MSEE while I work). I wish to simulate ground noise due either to dI/dT, return current path, or DC-losses due to the scenario of a PCB stackup and a PCB power/ground plane.

My approach is pretty basic; imagine I have a circuit (op-amp, CMOS driver, etc.) that switches between GND and +5 V driving a simple Rload to ground (say 50Ohms). As PCB guys, we know that the GND and +5V connections are all made through a Via, and then to a PWR or GND plane. However, due to the layout of the board there is also an ADC (say 5V and 24-bits for nV levels of LSB resolution) who has its pins also conected to vias to GND and PWR.

So the interesting simulation becomes moving around the ADC placement'sto measure what signal gets picked up on the ADC-ground plane connection; far away for low HF-noise coupling, but suffers from high DC V=IR drop.

Currently my approach is to draw this structure in HFSS (a 3D field solver), extract S-parameters, and import as models into ADS.

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samicksha
samicksha
11/15/2013 2:25:43 AM
User Rank
Artist
Re: Simulating Ground Noise
One of the major reason i find here is GPD due to electrical installation...

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DaeJ
DaeJ
11/14/2013 9:25:48 PM
User Rank
Master
TEM Transmission Line Area
I think that there are formulation between Vcc and Line area to avoid fuzzy return path area. Generally speaking, Vcc and decoupling CAP is located as close as possible. But I wonder there is some correlation between the voltage level (for example, 5 V, 3V and 0.7 V) and Transmission line regarding return path area. Of course CAP value is also considered.  

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eafpres1
eafpres1
11/15/2013 12:02:56 PM
User Rank
Blogger
Co-planar waveguide and other tricks
@Bruce--an interesting situation having one conductor of an RF transmission line at positive DC voltage.  However, odd as this sounds, it actually is very common.  For example, all high performance GPS antennas contain a low-noise amplifier to add 25dB or more of gain to the incoming signal.  The amplifiers are usually powered by putting 5V or 3V on the center conductor of the coaxial feed.  There are many other situaions in RF like this.  Many readers have probably used a "bias tee" to injet power into a coaxial line for a test setup.

On the topic of the PCBs, when I was in the antenna business we helped customers figure out transmission line layouts to connect an RF section to the antennas.  In some cases it was preferable to create co-planar waveguide instead of microstrip line.  Generally we would make the outer "ground" conductors as a pad area that followed the line, and ask them to put lots of vias in to the "real" ground plane.  Since the fields in CPW are more confined, this often worked well.  It has the additional beneift that it is easier to design a matching network becuase you cap more easily put SMT components bridging across from the center conductor to the ground all in the same plane without additional interconnect.

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D Feucht
D Feucht
11/17/2013 10:18:27 PM
User Rank
Blogger
Re: Co-planar waveguide and other tricks
Bruce,

In answer ot your friend who claimed that "Maxwell's equations, ... are accepted as the basis for all electromagnetic (and therefore circuit) theory", I would add that they are also not the completion of fields theory. Some physicists think that electric and magnetic potentials are more real than the fields.

There is still a concept of ground (0 V) in distributed-parameter circuits because even in them, currents flow in closed loops and somewhere in the loop(s) is a spatial point at which the electric potential is deemed to be 0 V. However, as you point out, one must be (spatially) careful in declaring such nodes in distributed-parameter circuits!

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etnapowers
etnapowers
11/18/2013 9:17:27 AM
User Rank
Master
Voltage in maxwell equations
The voltage is a function that in static case is the scalar function that  originates the electrostatic field:

E=-grad V

being E a vector and V a scalar function.

 

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etnapowers
etnapowers
11/18/2013 9:27:01 AM
User Rank
Master
power ground and analog ground
Many times I have engineered devices having two different ground pins: the analogic and the power ground.

In pcb traces, these path have to be separated but the potential has to be kept the same . The power ground has to dissipate an high pulsed current coming from power switches, and its potential can rise , hence the only chance to control the voltage is to force externally to a zero voltage the power ground pin, by checking the analog ground voltage, which acts as a feedback signal.

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amrutah
amrutah
11/20/2013 11:47:04 PM
User Rank
Master
Re: power ground and analog ground

@etnapowers: Yes as you mentioned when designing IC's we have different grounds for Analog section, Digital section and substrate base.  This is done inorder to Isolate the return current paths for these sections so that the highly switching digital logic don't interfere/disturb the analog section.

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etnapowers
etnapowers
11/27/2013 10:49:47 AM
User Rank
Master
Re: power ground and analog ground
@amrutah: thanks for your comment, this is the reason for why the designer's feedback is really important during the realization of the application board and the test board.

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Ranasinghe
Ranasinghe
11/30/2013 1:24:00 PM
User Rank
Master
Re: power ground and analog ground
Thanks Bruce for the informative post.

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etnapowers
etnapowers
12/5/2013 4:55:06 AM
User Rank
Master
Re: power ground and analog ground
@Ranasinghe:the post on power and analog ground is an example of the difference of theoretic design versus pratical realization. Theoretically you don't need two grounds, pratically yes, you need one ground to collect high pulsed current and one ground to be a reference to the logic signals, and you have to keep the two grounds at the same potential, by accordingly design your pcb layout. 

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etnapowers
etnapowers
11/18/2013 9:59:39 AM
User Rank
Master
ground paths as decouplers
When designing a PCB, a good strategy is to insulate two signal paths by surrounding the signals with ground planes. This will avoid cross talking and will provide a return path for the current.

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amrutah
amrutah
11/20/2013 11:53:15 PM
User Rank
Master
Finally the main sink is ground
Bruce,

   Thanks for an excellent post.

   You mentioned (w.r.t. the figure) that the electric lines of force may terminate on the VCC metal strip thereby causing a current flow into the VCC. Usually we will have a very good or wide Ground plane (usually 0V or near to it) metal strip, and that will form a capacitor with the VCC line.  The same switching current will then cause the electric lines from VCC metal to the ground plane thereby causing the current to return to ground?  So the final current is sunk in the ground plane.  Please let me know if I am wrong.

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SunitaT0
SunitaT0
11/30/2013 11:08:43 PM
User Rank
Master
Re : The Ground Myth
@Bruce, thanks a lot for the post. I totally agree with you that term "ground" is probably the most misunderstood and misused term in electrical engineering. Your post definitely helps us to understand the concept of "Ground" clearly.

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