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eafpres1
eafpres1
11/15/2013 12:02:56 PM
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Blogger
Co-planar waveguide and other tricks
@Bruce--an interesting situation having one conductor of an RF transmission line at positive DC voltage.  However, odd as this sounds, it actually is very common.  For example, all high performance GPS antennas contain a low-noise amplifier to add 25dB or more of gain to the incoming signal.  The amplifiers are usually powered by putting 5V or 3V on the center conductor of the coaxial feed.  There are many other situaions in RF like this.  Many readers have probably used a "bias tee" to injet power into a coaxial line for a test setup.

On the topic of the PCBs, when I was in the antenna business we helped customers figure out transmission line layouts to connect an RF section to the antennas.  In some cases it was preferable to create co-planar waveguide instead of microstrip line.  Generally we would make the outer "ground" conductors as a pad area that followed the line, and ask them to put lots of vias in to the "real" ground plane.  Since the fields in CPW are more confined, this often worked well.  It has the additional beneift that it is easier to design a matching network becuase you cap more easily put SMT components bridging across from the center conductor to the ground all in the same plane without additional interconnect.

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samicksha
samicksha
11/15/2013 2:25:43 AM
User Rank
Artist
Re: Simulating Ground Noise
One of the major reason i find here is GPD due to electrical installation...

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DaeJ
DaeJ
11/14/2013 9:25:48 PM
User Rank
Master
TEM Transmission Line Area
I think that there are formulation between Vcc and Line area to avoid fuzzy return path area. Generally speaking, Vcc and decoupling CAP is located as close as possible. But I wonder there is some correlation between the voltage level (for example, 5 V, 3V and 0.7 V) and Transmission line regarding return path area. Of course CAP value is also considered.  

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ernie.hanks
ernie.hanks
11/14/2013 6:24:38 PM
User Rank
Newbie
Simulating Ground Noise
Bruce!

Great topic and convenient timing! Being one who's relatively new out of school I understand your claim that the term "ground" coming from the academic world; I was always taught ground is 0 Volts. That is until I suffered from my first painful groundloop when making low-noise measurements at work 3months ago; specifically trying to measure nA currents with mA currents also flowing on the same PCB.


Do you have any experience simulating these ground noise problems? I've come up with a very interesting graduate project (as I'm currently finishing a MSEE while I work). I wish to simulate ground noise due either to dI/dT, return current path, or DC-losses due to the scenario of a PCB stackup and a PCB power/ground plane.

My approach is pretty basic; imagine I have a circuit (op-amp, CMOS driver, etc.) that switches between GND and +5 V driving a simple Rload to ground (say 50Ohms). As PCB guys, we know that the GND and +5V connections are all made through a Via, and then to a PWR or GND plane. However, due to the layout of the board there is also an ADC (say 5V and 24-bits for nV levels of LSB resolution) who has its pins also conected to vias to GND and PWR.

So the interesting simulation becomes moving around the ADC placement'sto measure what signal gets picked up on the ADC-ground plane connection; far away for low HF-noise coupling, but suffers from high DC V=IR drop.

Currently my approach is to draw this structure in HFSS (a 3D field solver), extract S-parameters, and import as models into ADS.

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