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EE-Bob
EE-Bob
11/28/2018 4:12:00 PM
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Single GND poured plane for SMPS Circuits
When selecting a switching regulator IC, in addition to availability, cost, part count, performance, and believability of modeling/simulation tools, I also consider if the circuit can be laid out on a single layer ... and more inportantly, with a single, contiguous ground plane (PGND) where the input/output capacitors, IC and feedback/loop conpantens can connect. The plane can be poured over an internal GND layer, but the vias used to connect the local PGND plane to the internal GND plane need to be carefully considered. A single via is great, but output currents may require more. These should be grouped as tightly as feasible. If the IC uses a thermal-pad, the vias can be placed under this pad to help with thermal performance. (However, consult your PCB Assembly CM for DFM concerns!) Location of these vias will also drive undamped/snubbed inductance in the switching node that can lead to ringing affecting you EMC performance.

This approach most resembles that of Example #1, only in a vertical stack rather than co-planar.

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raleighsimon
raleighsimon
11/28/2018 5:40:27 AM
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Newbie
cool
nice post

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alicetaylor
alicetaylor
11/22/2018 11:32:11 PM
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Newbie
thanks
Your topic is very great and useful for us...thank you

 

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