New addition to Synplicity’s HAPS ASIC prototyping system

Synplicity has announced an addition to its HAPS (High-performance ASIC Prototyping System) product family. Previous HAPS systems employed daughter boards for memory access, while the new HAPS-51 uses memory located on the board and next to the FPGA device.

The HAPS-51 is equipped with programmable clock generators, monitoring and self-test features, and remote configuration and setup capabilities. Additionally, multiple boards can be stacked or interconnected to support virtually any size ASIC, ASSP, or SoC design.

HAPS systems are the centerpiece of Synplicity's Confirma at-speed ASIC/ASSP verification platform. As with all HAPS systems, HAPS-51 utilizes the HapsTrak standard: a set of guidelines for pinout and mechanical characteristics to help ensure compatibility with previous and future generations of HAPS motherboards and daughter boards.

For more information about Synplicity's High-performance ASIC Prototyping System (HAPS) or the Confirma Platform, go to or contact your local Synplicity sales office.

Worldwide seminar series
During the months of October and November 2007, Synplicity and Xilinx will present a seminar series on design and verification methodologies intended to help designers save time and money on current and future design projects. Click Here for detailed information on this seminar series.

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