Introduction
As electronic sub-systems play a significant role in the reliable and safe operation of the overall product, adding an overvoltage protection (OVP) circuit around the DC/DC step-down regulator may be advisable. The intent is to prevent damage to logic or microprocessors (ÎĽP). Note that in the latest ÎĽP versions, their absolute maximum voltage is significantly less than intermediate bus voltages. Typical supply voltages are <2V on some rails.
For further insight into what operating environments and conditions warrant such protection, refer to “μModule Regulator Powers and Protects Low Voltage μProcessors, ASICs and FPGAs from Intermediate Bus Voltage Surges” from the LT Journal of Analog Innovation.
A critical portion of the OVP circuit is the crowbar , a component which, when triggered, clamps or shorts the output and ground (circuit common) connections of the step-down regulator to relieve the voltage stress on the load. The name comes from the idea that a large metal bar is dropped across the power supply's output terminals when trouble occurs.
Two of the most common circuit components utilized as a crowbar are the MOSFET and silicon controlled rectifier (SCR), also known as a thyristor. We compared the capability of both devices to protect a 1.0V output rail typical of modern digital logic cores using the LTM4641, a 38VIN , 10A step-down regulator as our test platform (Figure 1). This ÎĽModule regulator has an integrated output overvoltage detection circuit and crowbar driver. When an output overvoltage condition is sensed at the output, a built-in driver at the crowbar pin goes high within 500ns and the MSP MOSFET disconnects the input supply, VINH from the DC/DC converter.
Test conditions
For our tests, we assumed a 1.0V nominal output voltage representative of the core voltage of modern logic devices including FPGAs, ASICs, and microprocessors. A quick overvoltage response time is imperative for protecting low voltage logic whose absolute maximum voltage rating typically ranges from 110 percent to 150 percent of nominal. This fact is particularly important when the upstream rail is an intermediate bus voltage such as 12V, 24V, and 28V. In our tests, the input voltage was set at 38V and the adjustable output OVP trigger threshold was left at the default value of 110 percent of the nominal output voltage.
The results
MOSFET: First up is the MOSFET. An NXP PH2625L 3mΩ, 1.5VTH , 100A MOSFET in a 5x6mm Power SO-8 was installed as the crowbar with the gate tied to the CROWBAR driver pin. Under a direct short from VINH to SW, the excursion never exceeded 1.16V or 116% of nominal (Figure 2).
VOUT never exceeds 1.16V in the case of a direct short from VINH to SW.
VOUT : 200mV/DIV; CROWBAR: 5V/DIV
SCR No. 1: Next, we replaced the MOSFET with a silicon controlled rectifier (SCR) from Littelfuse and connected the CROWBAR driver pin to the gate of the SCR. The Littelfuse S6012DRP is rated at 100A peak surge current, 1.6V peak on-state voltage, and 1.5V trigger threshold in a 6.6 x 11.5mm TO-252 package. After protection engaged from an OVP event, the output voltage remained relatively constant at 1.6V, 60 percent over the nominal regulated voltage coinciding with the peak on-state voltage of the Littelfuse SCR (Figure 3). A probe added at VINH shows us that even though the input supply had already decreased to near zero, VOUT still remained high. Clearly, the Littelfuse SCR is unable to provide effective OVP.
The S6012DRP SCR was unable to pull VOUT below 1.6V (60% above VOUT-NOM ).
V INH : 20V/DIV; VOUT : 200mV/DIV, 1V @ 0DIV (1VDC offset); CROWBAR: 2V/DIV
SCR No. 2: For our next test, the Littelfuse SCR was exchanged for a Vishay SCR with a lower on-state voltage and trigger threshold. The Vishay 10TTS08S is rated at 110A peak surge current, 1.15V peak on-state voltage, and 1.0V trigger threshold in a 10 x 15mm TO-263 package. At first glance, the OVP protection with the Vishay SCR seems like an improvement over the Littelfuse SCR, however the output voltage peaked higher at 1.7V or 70 percent over the nominal regulated voltage (Figure 4). In this case, there appears to be no correlation between the OVP peak value and the on-state voltage of the SCR. In both cases with the SCR in place, the output voltage peaked between 12-14ÎĽs after the overvoltage event starts which indicates a response time delay by the SCRs.
The output voltage peaked at 1.7V (70% above VOUT-NOM ) before decreasing.
VINH : 20V/DIV; VOUT : 200mV/DIV, 1V @ 0DIV (1VDC offset); CROWBAR: 2V/DIV
Conclusion
This bench data supports our claim that SCRs react too slowly and have too high an on-state voltage to be an effective crowbar for today's most advanced FPGAs, ASICs, and microprocessors. Furthermore, the SCRs require more PCB area than the MOSFET that outperformed them. A MOSFET such as the NXP PH2625L in conjunction with the LTM4641 is a more reliable and effective method of powering and protecting the latest digital logic devices.
Acknowledgements
Jason Sekanina, design engineer, contributed to this blog by providing assistance fabricating the test fixtures, running the tests, and collecting the scope screen-shots. The blog would not have been possible without his help.
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- LDO, Switching Regulators Get Some Deserved ‘Fundamentals’ Attention
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- Digital Power Supplies Are Getting Easier
- Active Load for Power Supply Testing
Granted, your circuit example is looking at an output voltage of 1V, I have used the LT4356 for circuit protection. It does not have crowbar protection, but it does have the ability to shut off the circuit from the input supply if the voltage is exceeded or if there is a short on the output.
SCR just has a gate, once turned on, it will stay on untill the current falls below a threshold and if talk about crowbar over a clamp it carry higher fault current without dissipating much power.
MOSFETs are better in many ways from my own design experience also when your supply voltage is very small. Even the ease of integration seems to be better. SCRs may not be optimal as when the voltage level is very small, you have some issues. As we move to sub-20nm processes, I do not see the relevant of SCRs in some of these applications.
I agree you fasmicro, but increasing density of MOSFET on an IC creates problems of heat generation that can impair circuit operation and further leading to slow operations of circuit at high temperatures.
Willie Chan,
Awesome narration of all the episodes.Â
I would also like to add that SCRs are current controlled devices and FETs are voltage controlled. In order to trigger an SCR, a gate current has to be injected, if I am right. Whereas in the case of a FET, it is enough if the voltage reaches the switching on threshold and the crowbar falls. What is your opinion on this?
I think that adding heat sink might be helpful for heating issue around MOSFET unless there is a space related to problem in the PCB board.
All workstations of SCR, MOSFET and IGBT are completed with proper colours of banana connectors. Distinct Triggering pulse is delivered for each device.
My apologies for the delay in my reply, this blog posted to the web right before a 10 day vacation with family.
@ Jayaraman: You are correct that SCRs are current triggered devices, however for simplicity we compared the VT of the MOSFET with the VGT of the SCRs i.e. the voltage required to create the necessary current to trigger the SCRs as specified in the respective datasheets.
To address others' question whether heatsink makes sense: As evidenced in Figure 2, within 40ÎĽs of being activated the crowbar MOSFET no longer dissipates any power therefore a heatsink is of little value.
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Thanks willie.
I also would like to add that , in case of SCR, only triggering is needed and there is no need for maintaining the ON status. However, the Gate voltage has to remain in the active state as long as the FET is expected to be ON.
>>I agree you fasmicro, but increasing density of MOSFET on an IC creates problems of heat generation that can impair circuit operationÂ
Not necessarily – that you have more transistors in a circuit is not the reason why you have more heat. I think when you discuss power disspitation, you are looking at the feasture size of the transistor and not necessarily how many of them are in a circuit
Heat sink is not done at the circuit level. These are things done at the board level. It is a different strategy when you are still at the ASIC level. How can you reduce dynamic power dissipation? Static power dissipation etc? These are real issues that one must think through when choosing process technology in ASIC design
First, if you are considering dynamic and static power dissipation, you would select other ASIC chip. Second, photonic chip could be used to complex device by photonics design automation tool-set, not by electronic design automation.
 I am sure it is not necessary to put a heatsink on the MOSFET, but yes, the heatsink must be insulated, again if i like to use the temperature control for an unusually high load, then adding a little heatsink to the MOSFET may help.
>>Â Â photonic chip could be used to complex device by photonics design automation tool-set
What is a photonic chip?
>>Â then adding a little heatsink to the MOSFET may help.
How can you put heatsink in a MOSFET. Do you mean a chip?