Advertisement

Article

Power design challenges for Digital Flat TVs

Introduction
The growth trajectory of Digital Flat TVs puts them on a pace to gain >50% of the worldwide TV market in the next year. The power design challenges for the flat TVs (Plasma and LCD) differ significantly from the CRT TV applications. The primary challenge is in fitting the power supply into the thin panel format. Along with this come the tasks of managing the heat and EMI in close proximity to the video circuits. The power levels required are higher compared to CRT requirements and the required voltages are different, thus complicating the problem further. By one estimate, power supply constitutes 12% of the BOM cost of LCD TV if the display cost is excluded. Physically also, it occupies a significant part of the real estate behind the screen as shown in Figure 1.


Figure 1. Picture of a 46″ LCDTV back panel. Source iSuppli

Figure 2 provides the architectural overview of an LCD TV system with the power system blocks highlighted. The front-end is an ac-dc converter that takes universal ac input (90-265 Vrms) and converts it to isolated dc voltage(s) after applying power factor correction (PFC) upfront. For smaller screen sizes, if the power input is below 75 W, PFC may not be required. One of the primary voltages (24 V typical) generated by the ac-dc converter primarily feeds the backlight inverter and its current/power requirement depends on the number of CCFL lamps used in the display (larger the screen size, higher the power requirement). Backlighting can consume more than 80% of the total power in a large LCD-TV. The second key voltage out of the ac-dc converter is the 12 V output used for the audio subsystem and downstream system power after a dc-dc conversion stage for the low voltage signal processing and processor power. Small TVs may use 12 V for backlighting and powering the audio amplifiers. There is an additional requirement for a 5 V standby power with up to 2 A current capability.


Figure 2. Typical LCD TV block diagram with power processing blocks highlighted

All other voltages required in the system are derived by additional processing using LDO or dc-dc converters. The physical location and choice for this processing depends on current requirements, physical constraints, etc.

All other voltages required in the system are derived by additional processing using LDO or dc-dc converters. The physical location and choice for this processing depends on current requirements, physical constraints, etc.

Typical Platforms for Different Screen Sizes
While individual design requirements vary depending on factors such as panel size, panel manufacturer, audio requirements, chipset used etc. the imperative for the TV manufacturers and their power supply ODMs is to come up with standard platforms which can be quickly adapted for differing requirements. These standard platforms may cover a given range of panel sizes (e.g. one platform for up to 26″, another for 26″ to 32″ and so on). The platform choice is primarily dictated by the cost factor. Since the smaller screen size (<26", <150 W) designs are lower power and most cost sensitive, they are dominated by simple flyback designs. If PFC is required, Critical Conduction Mode (CrM) circuits are used to minimize the cost. However, the need for low EMI and high efficiency has necessitated use of valley-switching (or QR) flyback topology. Minimizing heat generation inside the TV is important since LCD-TVs are passively cooled and the significant differences in the temperature between the top and bottom of the set may impact the consistency of the CCFL lamp light output. It has been demonstrated that using the appropriate semiconductor solutions from ON Semiconductor and other vendors, the cost impact of changing from traditional fixed frequency flyback to valley-switching is negligible. The low-end designs incorporate single 12 V output power supply and create the 5 V using post-processor. The standby management is tricky in this approach as it requires additional load switch.

The next platform level is used for 26″ to 37″ TVs with power level between 150 and 250 W. For these systems, it is imperative to have a separate standby converter within the power supply board, as meeting a standby requirement of <1 W input power for 0.5 W load becomes difficult otherwise. In addition, the transition to 24 V output for backlight inverter occurs. The other signal processing circuits and audio still require 12 V bus, so multiple output converter is typically used. While the traditional and lower end platforms still use the flyback topology for the main converter as well as the standby converter, there is increasing trend to utilize the soft-switching topology of LLC half-bridge converter for higher efficiency and lower EMI.

For the higher screen sizes (>37″), where the power level is >250 W, the use of LLC half-bridge converter for main power is more commonplace. Moreover, the PFC function is typically implemented using the Continuous Conduction Mode (CCM) circuits. The power level and complexity of requirements increases. Hence, the auxiliary power is handled through a flyback converter. The second rail on the main power goes up to 14 V to support increased audio power requirements.

PFC Overview
Although the driver for the PFC implementation is primarily IEC61000-3-2 (European standard for harmonic reduction), the side benefits of active PFC front-end have made it almost a universal choice for a vast majority of flat display TVs. This is in stark contrast to the CRT TVs where PFC solution (if any) was predominantly passive and bulky. The design challenges for the PFC front-end have been eased by recent introduction of simplified CCM controllers such as NCP1653 and supporting collateral. As indicated above, the common choice for the low-end solutions is the CrM topology supported by controllers such as the NCP1606. However, a recently introduced variant, Frequency Clamped CrM approach (exemplified by NCP1605) is gaining acceptance due to its improved standby management and lower EMI.

While selecting the PFC topology for the flat display application, it is important to consider issues such as sequencing of power stages, hold-up time, output voltage range, operation in standby and light load, etc.

LLC Half-Bridge Overview
The choice of appropriate topology for the main power stage is dependent on factors such as power level, designer familiarity and output requirements. Table 1 provides a simple overview of various solutions for different screen sizes. While the flyback approach is very popular, the LLC half-bridge converter needs special mention.

Table 1. Choices for the SMPS topology

This topology provides significant reduction in power losses by eliminating the turn-on switching losses. In addition, as shown in Figure 3, it is relatively simple in that it does not require output inductor unlike other resonant approaches. The resonant tank can also be simplified by integrating the resonant inductor into the main transformer. It also limits the switch voltage stress to maximum of input voltage. These benefits make it a very convenient choice for the high power LCD and Plasma TV power supply design. The presence of a stable PFC voltage rail simplifies the design process as the switching frequency does not vary significantly. However, designing the power supply using this topology requires special considerations and trade-offs. These include choice of resonant tank, input and output capacitors and transformer design. These are covered in related ON Semiconductor publications for NCP1396 [1]. It has been demonstrated that using the LLC half-bridge topology, above 90% efficiency can be achieved.


Figure 3. Simplified schematic of LLC half-bridge converter

Emerging Architecture and Trends
As the growth in LCD TV picks up pace, the pressure to build more cost effective and energy efficient power supplies also increases. There are two major initiatives being pursued to meet this demand.

The first is the recognition that the input voltage range diversity of markets offers an opportunity to customize the power supply for a given market. For example, designing a power supply for the North American market alone would limit the input voltage range to 90-132 Vrms and also eliminate the PFC regulatory requirement. This can result in significant cost down and optimization of the power supply. Similarly designing for European mains with PFC can also allow a targeted, optimized design.

The second significant architectural trend is to integrate the backlight inverter into power supply in what is known as LCD Integrated Power Supply (LIPS). This approach eliminates the need for a 24 V rail for the backlight inverter and powers the inverter directly from the PFC output voltage (390 V). This results in reducing the overall system power, reduction of heat in the chassis and cost reduction. However, since it involves merging of two different sections of the TV which may be sourced from different vendors (one from panel supplier and the other from power supply ODM), this trend has challenges from supply chain management point of view as the power supply must now be optimized to a specific panel manufacturer and lamp configuration.

Solution Example
The new requirements outlined in this article suggest that meeting them is an ongoing challenge for the TV manufacturers and their suppliers. Coupled with the very narrow design cycle times, it makes sense for the stakeholders to use proven platforms. ON Semiconductor is at the forefront of providing complete reference design solutions for the LCD TV power requirements. These reference designs incorporate complete solution validated to meet all the system requirements and they are fully documented. One such reference design is shown in Figure 4 and is freely available for download [2].

The reference design has a PFC stage incorporating the Frequency Clamped CrM topology that allows good standby performance and allows the maintenance of steady rail voltage at the output using the skip-mode operation. It has a standby power supply for 5 V, 2.5 A output using the NCP1027 regulator. The LLC half-bridge converter generates 3 outputs (24 V, 6 A for backlight; 12 V, 3 A for panel and audio and 30 V, 1 A). The efficiency of this reference design is above 90% at 230 Vac input and input power is demonstrated to be below 1 W for 0.5 W load on standby. It also meets the IEC 61000-3-2 harmonic requirements.


Figure 4. Reference Design for 220 W LCD TV Power Supply

Conclusion
This article has provided a brief overview of the emerging challenges and trends in flat TV power architectures. These trends are dictated by the need for lower power losses to manage heat, need for lower EMI and the ever-present need to reduce costs. The challenge gets tougher as TV manufacturers rush to introduce thinner LCD panels. Many changes are afoot in the backlighting technology such as CCFL with LIPS, EEFL, or even RGB LED light sources. In coming years, these changes are bound to keep the power designers on their toes and require them to keep on providing more innovative solutions. Finally, the increased popularity of the LCD TV has caught the eyes of the regulatory agencies and they are considering energy consumption regulations in these products in the near future.

References
[1] ON Semiconductor, NCP1396 application information,
http://www.onsemi.com/PowerSolutions/product.do?id=NCP1396
[2] ON Semiconductor publication TND316-D,
http://www.onsemi.com/pub/Collateral/TND316-D.PDF

About the authors
Dhaval Dalal is Systems Engineering Director for Power Supplies at ON Semiconductor. Since joining ON in August, 2002, Dhaval has been
responsible for defining strategy, roadmaps and technical content of many products for power supply applications. Prior to joining the company, Dhaval worked at TI/Unitrode for 8 years in various
responsibilities including product definition, applications, product management and strategic marketing. Earlier in his career, Dhaval gained valuable experience by working as power supply design engineer at
Digital Equipment and as a researcher at Philips Laboratories. Dhaval's educational background includes B.Tech.(EE) from IIT-Bombay, MSEE from Virginia Tech and a Masters' in Management of Technology from NTU. He has published and presented more than 20 technical articles, papers and invited talks. He also participates in many initiatives of PSMA (Power Sources Manufacturer's Association). Dhaval holds 4 US patents. He may be reached at
dhaval.dalal@onsemi.com
.

Bernie Weir has more than 20 years experience in the electronics industry and has held various positions in application engineering, strategic marketing and product management. He is currently a Manager within the Power Regulation Group of ON Semiconductor where he is involved in next generation Digital TV Power architectures and Solid State Lighting applications. He has published numerous articles and
holds 3 patents. Prior to the founding of ON Semiconductor, Bernie worked for Motorola where he was involved in the development of low voltage portable power management ICs, RF PLLs and synthesizers, optical module products, RFICs, and ultra high speed gigabit ECL products. Bernie holds a BSEE degree from Rose Hulman Institute of Technology. He may be reached at
b.weir@onsemi.com.

0 comments on “Power design challenges for Digital Flat TVs

Leave a Reply

This site uses Akismet to reduce spam. Learn how your comment data is processed.