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Review of GaN-on-Si RF Power Device Market

A transition towards gallium nitride on silicon (GaN-on-Si) RF power devices is happening in the market, which is a trade-off between enhanced performance and moderate cost. GaN power amplifiers offer superior power capability, efficiency, bandwidth, and linearity compared with pure silicon or gallium arsenide (GaAs)-based technologies commonly used, enabling higher performance and lower overall system costs. GaN-based low-noise amplifiers tend to exhibit improved robustness, noise figure, and dynamic range compared with Si and GaAs devices.

In addition, GaN-based transistors can operate at high temperatures, reducing system cost, size, and weight, which are traits that have elevated its rank for defense applications. However, the growth of GaN-on-Si is advantageous in more cost-sensitive commercial applications where some performance metrics associated with silicon carbide can be compromised for the lower cost of silicon wafers. Silicon carbide is the more ideal substrate for growth of GaN from a crystal perspective, but processing methods can be applied to achieve an acceptable defect density for certain applications on a less ideal wafer, silicon, that possesses a higher lattice mismatch for epitaxy.

The developers and producers of GaN-on-Si power electronics are pursuing various business strategies. Some companies are selling their devices on the open market, while others are targeting the closed merchant market. In addition, there is a niche market of companies offering design or foundry services or just licensing their technology. The closed merchant strategy, which is common with a new technology, is often implemented within a partner business relationship, which limits access to a vendor's know-how and its intellectual property (IP) via a non-disclosure agreement.

Companies pursuing this strategy include International Rectifier (IRF) and Transphorm. RF Micro Devices is an example of a company offering manufacturing foundry services providing access to GaN-on-Si high-power device technology that is available to its merchant customers and business partners. All in all, there are nearly 25 vendors engaged in the commercialization of high voltage GaN-on-Si high-electron mobility transistors (HEMTs), ICs, and modules for power conversion applications.

IRF started commercial shipments of GaN-on-Si power devices in early May and says that its capital-efficient manufacturing model enables customers with improvements in key application-specific figures of merit of up to a factor of ten compared to state-of-the-art silicon-based technology. Its recently released products are the result of ten years of research and development focused on the company's proprietary GaN-on-Si epitaxial technology. This company believes that GaN has the potential to be incorporated into every business unit and product line over the long-term.

The companies that are developing GaN-on-Si technology have several technical challenges to overcome for increased commercialization including: containing the current collapse phenomenon (where current decreases and on-resistance increases during operation), developing the technologies for manufacturing enhancement-mode HEMTs, and validating device reliability. Reliability is still somewhat suspect.

What’s more, GaN HEMT selling prices must become more competitive for penetration into the commercial power electronic market, which could be accomplished via manufacturing on larger, 200mm diameter Si wafers. The industry is just transitioning to 150mm Si substrates, so it still has a learning curve to achieve, as wafer processing evolution cycles are not trivial. More traditional GaN-on-SiC based power devices will still reign supreme in less cost-sensitive military applications that utilize the full benefits of these material systems, where performance is more critical.

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15 comments on “Review of GaN-on-Si RF Power Device Market

  1. amrutah
    May 27, 2013

    Brian,  Thanks for a very informative blog post.  Many things to learn here.

    I had never heard about the GaN-on-Si wafers in industrial use till now.  I always thought that the GaAs is the future we are heading to after silicon finding it difficult at handling higher speeds and leakages at short channel lengths.

  2. amrutah
    May 27, 2013

    As you mentioned, “GaN-based transistors can operate at high temperatures, reducing system cost, size, and weight…”

      Here the discussion is more about the performance, but how is the productivity of this technology. Can we have smaller device size in nm range so that it can compete with the ever increasing dominance of Si wafers?

      Also the wafer sizes should be large in order to have a good yield in competition with Si wafers.  Si wafers which are usually 200mm and 300mm inn future are targetting 450mm.

     

  3. amrutah
    May 27, 2013

    Since it is not a widely used process, how are the models developed for the transistor, since no many players are using it in the market, the time to develop the models should be one big task.  Once the refinement of the models is done then good and relaible products can be made available in the market.

  4. Davidled
    May 27, 2013

    Manufacturing small chip with more features becomes a challenge as a chip sensitive and variation is increased.  To avoid more defect of chip, advanced manufacturing process is required to minimize more defect of chip.  A new tool and innovation is required to compensate for the challenge in scaling of chip. Definitely, 450-mm wafers which mean smaller chip circuits and larger wafers, will allow more chip to be made in the plant at less cost.

  5. RedDerek
    May 27, 2013

    Interesting to note that many of the new wafer processing start on small wafers. I wonder if the basic equipment the foundaries are using is old equipment from the silicon foundaries as they have upgraded to larger wafer sized equipment. Or is the foundary equipment all new – thus increasing manufacturing cost.

  6. Davidled
    May 27, 2013

    Some of tool might be scrapped or retrofitted. I am sure the manufacturing cost is increased and a lot of attention is costly required for a high density chips. But company saves their capital down road. There is g450 consortium for semiconductor manufacturing community.

  7. SunitaT
    May 28, 2013

    @Brain, thanks for the post. GaN on silicon carbide (SiC) substrate have good crystal lattice matching while GaN on silicon wafers makes use of already developed automated IC production facility. Clearly there is the trade-off between performance and cost. Even then is there any way this crystal mismatch taken care in GaN-on-Si process?

  8. Brad Albing
    May 28, 2013

    Like amrutah said, I also am not very knowledgable when it comes to various technologies – so this is real good info to see online.

  9. Brad Albing
    May 28, 2013

    DaeJ – so with larger wafers, we can get more ICs per wafer – but we may just get more defective ICs per wafer. So just having larger wafers doesn't solve the problem.

  10. Brad Albing
    May 28, 2013

    >>Since it is not a widely used process, how are the models developed for the transistor…

    Looks like we should explore this in another blog

  11. amrutah
    May 28, 2013

    Yes, I agree with Brad.

    Earlier this month there was a blog by Scott, very helpful.  The best would be to have information regarding different technologies, the modelling methodology and market presence (present and future).  This will help many and guide many.  May be a series of blogs.

  12. bjcoppa
    May 28, 2013

    Yes, many techniques can be used to account for lattice mismatch. Buffer layers of intermediary alloy films similar to GaN or Si can be grown. In addition, companies can use wafer slicing and wafer bonding to avoid having to do heteroepitaxial growth of GaN on Si which lessens defect density in GaN layer. This is known as template layer transfer which Soitec has developed for GaN applications of this nature.

  13. bjcoppa
    May 28, 2013

    Most RF IC companies use much smaller wafer sizes than what is used in high-performance logic and memory devices. Typically RF or power ICs use 6 inch or less GaN, GaAs, or Si due to lower production volumes involved vs. logic and memory fabs. Equipment is often purchased as refurbished if given the choice. Foundries offer varying wafer sizes but are relatively larger in wafer size offerings due to more advantageous economies of scale. For Si, I believe most offer 8 inch or larger.

  14. bjcoppa
    May 28, 2013

    Interesting comments. Glad to see so much discussion. This appears to be one of the more active UBM tech blogs compared to the others in the network. Happy to see new ideas generated for other articles.

  15. Brad Albing
    May 28, 2013

    Yep – very interesting – and as you noted, drawing a good number of comments (14 as I write this) for a newbie blogger here.

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