Pipeline converter architecture has long been the choice for high performance and fast conversion rates and high resolution. Many applications benefit from pipeline converters including wireless base stations, automatic test equipment, medical imaging, and multimedia.
It's obvious that digital techniques continue to play a significant role in the blossoming multimedia era and even influence wireless systems. Additionally, the digital radio environment drastically changes even the way modern wireless communications systems are designed. For example, in software radios, intermediate frequency (IF) filters are being processed digitally, and the premium performance of analog front/back ends is required by most designers. The low-spurious specs of data converters are the key components that enable such evolution.
Pipeline converters can meet the needs of these applications and provide the spurious free dynamic range (SFDR) of 100dB, the high input bandwidth (a few hundred MHz), and the sampling frequencies to 100 megasamples/s (MSPS). Pipeline converters do, however, require a minimum sampling typically about 1/10 of its maximum sampling rate. For example, high-speed converters of about 80 MSPS would need a minimum sampling frequency between 1 and 10 MSPS. This may not be a problem for the telecom industry where the sampling frequency varies in a limited range, but it could be a problem for automated test equipment that needs a wide range.
The best apps for pipelines
“Pipeline converters are best used in applications that require 10 -14 bits of resolution, 10 – 200 MHz conversion speed, and low power consumption” said Leonardo Azevedo, Product Marketing Manager, Data Conversion Systems, at National Semiconductor. “Additionally, since pipeline converters usually require several clock cycles to complete a conversion, they find use only in applications where data latency is not critical,” he said. Examples include electronic imaging, communications and video.
The National Semiconductor ADC12DL066 is dual version of the company's ADC12L066 which is popular for GSM base station designs. The application usually uses two channels for diversity, so customers needed two parts per channel. Due to space restrictions on the customer's board and pressure to reduce system cost, National integrated the 2 parts and made a more efficient dual device which solved all those problems.
When the ADC10080 was introduced in July 2003, it was the lowest power 10-bit 80 MSPS pipeline converter in the market. Additionally, it was one of the only A/D converters that scaled power linearly with sampling speed. Power consumption is a critical spec in applications such as medical imaging and communications infrastructure, and this part was designed with that in mind.
National Semiconductors ADC10080 low-power A/D converter
“Pipeline A/D converters are used in all applications, however, typically those requiring higher conversion rates than SAR A/D converters and lower conversion rates than FLASH A/D converters,” said Kevin Kattmann, Product Line Director, Analog Devices High Speed Converters for Analog Devices. Also, pipelines have generally lower resolution than SAR A/D converters and more resolution than FLASH A/D converters. Typical performance for 8 bits is 100-500 MSPS, 10 bits is 20-250 MSPS, 12 bits is 1-250 MSPS, and 14 bits is 1-125 MSPS.
“Because they are “Nyquist rate” A/D converters, pipelines converters are useful in imaging applications where they digitize a pixel stream,” continued Kattmann. Important applications include digital still cameras, digital video cameras, and scanners. “Flat panel displays use triple ADCs to receive RGB data from PCs,” he said. “These are generally embedded applications where the customer does not see the converters, and all are huge consumers of pipeline converters. Another growing application of pipelines is digital TV (DTV). The level of design-in activity is increasing rapidly in DTV, some at the component level and some at the embedded level. The operating frequencies and performance levels demanded by these digital televisions fall squarely in the pipeline converter space. A growing market for pipelines is dealing with predistortion of the transmit signal in a cellular base station. The pipeline is used to sample the power amp (PA) output, either at RF or at a high intermediate (IF), sot that distortion components in the PA can be served out in real time. Finally, there are medical and instrumentation systems that require fast conversions such as ultrasound, and oscilloscopes, as well as RADAR and military uses,” he said.
Intersil is seeing applications where higher resolutions are needed for high-speed applications,” agreed Steve Smith, Product Marketing Manager: Data Converters at Intersil. “This applies to imaging, wireless communications, and video applications, with both undersampling systems such as what is used in communications systems, and in sampling of baseband signals that are approaching Nyquist bandwidths,” he added.
Intersil's latest line of analog front ends incorporate triple 8-bit pipeline A/D converters running from 140MSPS to 275MSPS. The company offers the X98014, X98017, X98021, X98024, and the X98027. These analog front ends are for display applications, and they contain all the components necessary to digitize analog RGB or YUV graphics signals from personal computers, workstations and video set-top boxes.
Intersil's analog front end incorporates a triple 8-bit pipeline A/D converter
The fastest pipeline A/D converters for IF sampling can eliminate a stage of down-conversion in some broadband applications. In such applications, the change from two stages of frequency conversion to one reduces cost, power, and board-space requirements by eliminating a mixer, a frequency synthesizer, filter components, and drivers. One recently introduced A/D converter from Maxim Integrated Products that meets the requirements for eliminating an IF stage is the MAX1124 that achieves 10-bit, 250-Msample/s performance.
Maxim 250 MSPS pipeline converter
“The pipeline architecture is optimized for high resolution (10- to 14-bits) high speed (above 5 MSPS) operation,” said Atsushi Kawamoto, a design engineer for Linear Technology. Key applications are:
* Imaging (CCD, CMOS, IR, x-ray) — As sensor resolutions increase, higher speed A/D converters are needed to maintain fast frame rates. High A/D converter resolution is also required to capture the full dynamic range of the sensing element. A timely example is the global drive toward high definition television (HDTV) broadcasts and the necessary equipment upgrades. For HDTV broadcast cameras, OEMs require low power 14-bit 80 MSPS A/D converters.
*Wireless communications — High speed high resolution A/D converters are needed for under-sampling architectures which often sample wideband, multi-carrier signals at high intermediate frequencies (IF). The higher the sample rate, the wider the Nyquist zone, so that additional carriers can be digitized by a single A/D converter. A key under-sampling application is base station transceiver design for next generation wideband CDMA (WCDMA) cellular communication. In a modern WCDMA transceiver, high speed high resolution A/D converters are needed in both the receive and transmit paths. In the transmit path, high speed A/D converters are used to digitize the power amplifier (PA) output in digital pre-distortion systems aimed at linearizing the PA response. For mainstream WCDMA applications, low power and excellent under-sampling performance is needed at 12-bits and 122.88 MSPS.
* Wired communications — Next generation wired communication standards often rely on high speed Nyquist rate sampling to digitize wideband input signals. A key application for high speed Nyquist sampling is Data Over Cable Service Interface Specification (DOCSIS) compliant cable modem termination systems (CMTS) design. A universal design that simultaneously meets the North America, Europe and Japan standards requires low power 10- or 12-bit 170 MSPS A/D converters.
The LTC1750 is a 5-V 14-bit 5/80 MSPS A/D converter optimized for under-sampling applications, specifically cellular base stations. (It was selected by readers for the EE Times and eeProduct Center “ultimate product award“). The device provides wide input bandwidth and excellent dynamic performance for direct IF digitizing applications. The LTC1750 under samples up to 500 MHz input frequencies and delivers 84 dB SFDR with 140 MHz inputs and 74dB SFDR with 350 MHz inputs. The device's wide bandwidth and excellent AC performance are ideal for use in cellular base stations and broadband software radios, where it can directly digitize the first IF and eliminate the second IF down-conversion stage. Additionally, the company says it will be introducing a family of low power, high speed A/D converters in the coming weeks. LTC says this family will provide lower power consumption without sacrificing AC performance.
Spurious-free dynamic range for the Linear Technology's LTC1750 pipeline converter
Is CMOS the best process at sub-volt range?
“On the current supply levels, we believe CMOS still has room for improvement,” said Eduardo Bartolome. Systems engineer manager for High-Speed Analog-to-Digital Converter Group. “Nevertheless, we know that there are some other limitations, not necessary linked to supply levels, that we need to address and for that we are working with bipolar processes,” he said.
“The alternatives will largely depend on the type of performance required,” Maher S. Matta, Maxim's Product Line Business Manager of High Speed Data Converters. “For applications that require relatively low dynamic performance (8- and 10-bit Converters), it is likely that <1V CMOS can be used to implement pipeline converters. On the other hand, for applications that require high dynamic performance it will be very difficult to synthesize those requirements in <1V CMOS," said Matta.
Maxim's Matta says a better approach is to study the overall system and determine if there is a smarter way to segment the blocks. If the system has a large digital component that requires the migration to sub-micron CMOS for speed/cost/size issues, one can argue that a better approach would be separate the high performance converters from the digital blocks and integrate the converters with other analog/RF blocks. This would allow the digital blocks to continue down the path of shrinking geometries without being impeded by analog blocks. The key to this segmentation will be the interface between the analog / digital domain and the correct integration on the analog blocks.
From the point of view of analog circuit design, CMOS scaling provides key benefits that enable both lower power and higher speed operation,” observed LTC's Mr. Kawamoto. “For a given analog bias current, a shorter channel length process provides transistors with higher trans-conductance, a key figure of merit for device performance. The smaller transistor dimensions also result in lower parasitic device capacitance. In each pipeline stage of a high speed A/D converter, the analog settling speed of critical circuits such as precision operational amplifiers is largely determined by transistor trans-conductance. Thus, shrinking channel length allows higher speed operation for a given total bias current. As an added benefit, the supply voltage typically scales down with channel length, so that total power dissipation is reduced even if the analog bias current remains the same. By scaling the process, the A/D converter designer has the flexibility to increase speed at a given power level or to reduce the power for a given speed. However, there is an important drawback of process scaling for analog circuits. As the supply voltage is reduced, the full-scale input range of the A/D converter must also be reduced to provide adequate voltage headroom for analog circuitry such as operational amplifiers. Since a smaller input range results in less signal power, the SNR tends to fall as the process is scaled,” said Kawamoto.
The challenge for low power, high performance design is to also reduce the thermal noise contribution of the A/D converter to maintain an adequate signal-to-noise ratio. “It is easy to design a low power A/D converter simply by throwing away SNR performance,” said Mr. Kawamoto. It is much more difficult to deliver high performance while still maintaining low power operation. At each process node and supply voltage, achieving an optimal balance between low power and high SNR to meet the needs of users will continue to be important for future A/D converter designs. “The alternative processes such as complementary bipolar which were widely used by some manufacturers in previous generations are much more power hungry and difficult to scale, as evidenced by the lack of next generation 3.3/2.5/1.8V parts in those processes,” observed Kawamoto.
There are three important points to make about pipeline converter performance and lower voltages, according to Larry Singer, Fellow, at Analog Devices High Speed Converters group. “First, the supply creep is only important for A/ D converters that have to reside on a system with a low supply. As a standalone product or even as a part of a larger system, there are plenty of components at higher supplies, so there is no need to run down the CMOS process scaling for pipelines. For those systems that need a low voltage A/D converter, there are a couple alternatives. First, the A/D converter can be made on a higher supply using a process option (most CMOS processes offer “high voltage” devices for I/O and more for analog functions). Second, advances in conversion technology improve the state of the art constantly. For example, background calibration will enable conversion architectures that are highly nonlinear initially but show characteristics become increasingly linear over time. These developments should allow pipelines to operate down below 1 V. Of course, these developments rely on lots of digital processing power, but that is exactly what the low-voltage CMOS processes offer at low cost. Third, alternatives will emerge. Sigma delta A/D converters are not necessarily the answer, but do offer some attractive tradeoffs (oversampling rate for SNR, for example),” said Mr. Singer.
However, as supply voltages creep down, all analog circuit technologies will continue to be challenged to maintain good signal to noise, pointed out Mr. Azevedo, of National Semiconductor. “The advantage of CMOS technology over competing technologies such as bipolar actually widens as supply voltages creep down to the sub-volt range. This is because the threshold voltage of CMOS transistors can scale with the supply voltage, while the intrinsic threshold voltage of the bipolar transistor cannot,” he added.
Key drivers for pipeline performance
Future performance requirements on the A/D converter are the familiar ones which have driven innovation for many generations, observed Todd Nelson, Product Marketing Manager for LTC. “Simply put they include, faster sampling rates to support wider signal bandwidths, increased resolution and dynamic range to resolve more complex modulation schemes, and higher input bandwidths to accommodate frequency planning for novel communications standards. However, each of these high performance needs directly competes with the requirement for low power consumption. Low power operation has emerged as a key common user requirement in many end markets. Finally, the requirement for low power will continue to drive developments of high speed A/D converter in the future,” added Nelson.
“Pure performance is usually not required by many applications except applications such as instrumentation,” said TI's Eduardo Bartolome. “Most of them have some trade-off limitation, on power, and from that point of view, all those applications are challenging. Cost is also a limitation in some markets, like ultrasound, and customers prefer to avoid high performance devices in cost sensitive applications,” he stated.
The ADS527x family from TI, announced in February 2004, targets the ultrasound market, where designs use on the order of 128 A/D converters. With such a high quantity of converters you have to consider your board real estate and power budgets very carefully, without sacrificing performance. The ADS527x is the only 8-channel device in the market. According to TI, this family offers double the density of its nearest competitor, while also providing less power and similar or better performance.
Texas Instruments' ADS527x pipeline converter block diagram
“Test equipment is a big driver of higher performance components,” stated ADI's Kevin Kattmann. “By definition test equipment is expected to outperform the devices it is testing. ADI fights this battle in its labs as engineers struggle to test converters that outperform the test equipment used to make measurements. Additionally, portable (mainly consumer products such as cameras and digital video) systems will continue to drive power down. Cellular base stations are currently driving signal-to-noise ratio and spurious-free dynamic range (SFDR). However, bandwidths (i.e., sample rates) are not increasing (cellular spectrum is fixed). One of the biggest drivers at the moment is the economy. All vendors are trying to cut cost at the expense of increased performance. This should continue until the next spending turnaround,” he predicted.
“Drivers for pipeline ADCs will be equipment segments that require dynamic performance, high IF sampling capability, large bandwidth, low power and speed,” said Maxim's Maher Matta. This equipment includes cellular base-stations, broadband communications systems (for example, point to point microwave), medical imaging, instrumentation, military (such as RADAR, or electronic warfare), cable network infrastructure, and instrumentation. All of these systems require converters that can digitize large bandwidths with very good dynamic performance (including SNR, SFDR, intermodulation distortion, and adjacent channel leakage power ratio) while consuming low to moderate power.
Maxim says the MAX12553 meets the need for excellent dynamic performance (SNR, SFDR) at high IF with low power consumption. Its new family of 14- and 12-bit products offer the ability to sample intermediate frequencies of up to 400 MHz while delivering outstanding dynamic performance at low power. For example the MAX12553 offers a SNR of 71dB and a SFDR of 80.7dBc at Fin of 175MHz while only consuming 363mW. The ability of this family of converters to sample at high IF allows the user to select an architecture that eliminates a down conversion stage. This eliminates several components thus minimizing board space, reducing cost and simplifying the design. This family will be expanded shortly with higher speed versions of both the 12- and 14-bit products.
What ho the future?
The trend for high-speed and resolution pipeline converters, at first blush, will probably be about lower power while maintaining converter resolution, but maybe that could defined simply as better performance. “For a long time, performance was measured as the speed/resolution point,” said ADI's Larry Singer. “More and more performance is being measured by value. Size, power, ease of use, cost, features, and integration, are some of the parameters. Going faster is only seen as better when it enables a new architecture or partitioning that adds capability or cuts system cost. This can involve more than just the converter. For example, how does a customer drive a converter at IF frequencies and still maintain high dynamic range? Or, how does he clock the part or how does the design engineer receive the data? The trend these days is to consider the system/application and design performance that solves real problems. Lower power and much lower cost, rather than breakthroughs in conversion rate or dynamic range will dominate the market. Additionally, added features (ease of use, smaller size, multiple ADCs, serial I/O) rather than performance. Breakthroughs in speed will come before breakthroughs in dynamic range, because no one can use a 16-bit ADC. Probably, those breakthroughs will come by solving the parallel ADC problem (for example, you can increase conversion rate by paralleling ADCs together and running sequentially, like a gattling gun.),” said Mr. Singer.
TI's Eduardo Bartolome says ADCs are applied in many different markets, and thereby, follow different trends. For example, in multi-channel applications, like ultrasound, there is a trend to more integration, lower power and serialized outputs, while keeping resolutions below or equal to 12-bit — until, at least, 14-bit options become price competitive. Even in a market like base-stations, one can observe different trends. For instance, while the new standards with the current architectures are less demanding on the ADC, enabling customers to avoid the expensive high-end devices, other customers will still try to pack as many carriers as possible through the ADC to further reduce cost and they still demand the last dB of performance that they can get.
According to National Semiconductor's Leonardo Azevedo, the trends are toward lower power consumption and multiple converters in a single package. National also see these converters using chip scale packaging to reduce package parasitics, improve thermal performance, and to reduce footprint size. Using serial LVDS outputs also helps reduce pin count and simplify board routing making the designers lives simpler.
LTC's Todd Nelson says there are some applications that will continue to require faster and faster sample rates for next generation designs. The resolution requirements for pipeline ADCs seem to be around 12- to 14-bits for most applications, even in next generation designs.
“Pipeline converters have certainly not reached the peak in terms of speed or performance,” said Maxim's Matta. You can expect additional improvements in both speed and resolution in the near future. That sentiment certainly speaks for the rest of the converter manufacturers that are riding the pipeline waves into the future.
Analog Devices, Inc.
Tel: 1/800-ANALOGD (262-5643)
Tel: (321) 724-7000
Linear Technology Corp.
Maxim Integrated Products, Inc.
Tel: 408-737-7600 or 800-998-8800
National Semiconductor Corp.
Texas Instruments Inc.
Tel: 800-477-8924, ext. 4500