Every op amp and fully differential amplifier (FDA) report a slew rate (SR) specification. Similar to the reported gain bandwidth product (GBP) for voltage feedback amplifiers (VFAs), this key AC performance number is prone to error in both reporting and interpretation. Progressing from lower (Part 1) through higher speed (Part 2) devices, both the reported and physical slew rate effects will be detailed here.
Whether slew rate limits the performance for a particular device depends on the “instantaneous” output dV/dt demands given the small-signal frequency response and the desired output step, VSTEP. All op amps and FDAs have internal slewing mechanisms at both the input and output stages. Those physical dV/dt limits are instantaneous, not average, slope related. There is a legacy of reporting a single slew rate number in all op amp or FDA datasheets for this very approximate metric. Internal and external elements that will influence the available maximum output dV/dt include:
- Supply current and its variation part to part and over temperature.
- Total supply voltage across the device – higher supplies will often reduce the internal voltage dependent capacitors that need to be slewed, incrementally increasing the available SR.
- Output loading – capacitive loading can run into a peak i/C = dV/dt limit before slew limiting.
- Amplifier configuration – inverting is always a physically higher slew rate than non-inverting.
This physical dV/dt limit lies latent beneath the application’s small-signal response and only appears as the desired output swing pushes into slew limiting effects. For the vast range of higher voltage, low power, precision VFA op amps, a slew-limited response over a large part of an output square wave transition seems pretty common. Because a slew limited output adversely impacts both settling time and distortion, most higher speed applications select devices and/or application configurations to stay well below a slew limited response. The starting point for assessing slew rate limits is the intended small signal frequency response (SSFR) in the application. These issues include:
- Desired small signal gain – higher gains using VFA’s will reduce the small signal bandwidth (SSBW) reducing the peak dV/dt for a linear output step.
- SSFR shaping – for instance, low pass active filter stages will produce a specific SSFR that will be producing a much lower peak output dV/dt than a simple gain of +1V/V stage using the same device.
So, what are the various ways slew rate shows up in device data sheets and then applications?
Lower speed VFA slew rate specifications and performance.
In high speed amplifier developments, one of the key questions is how close to the available SSBW can we make the large signal bandwidth (LSBW). The LSBW becomes the full power bandwidth (FPBW) if the output VPP is close to the maximum available for the selected supplies. Slew limiting shows up in both step response and LSBW testing. Step responses transitioning from linear to slew limited will be the focus here. In lower speed, precision, VFA devices, LSBW matching to SSBW is a secondary concern, with power efficiency and input offset voltage and temperature drift taking precedence. A typical performance plot (Figure 39, reference 1) for the precision OPA192 appears in Figure 1.
A few of the stated (and unstated) nuances for this ±5V large signal output step include –
- To produce a slew limited output, a very fast input edge, ±5V, square wave is required.
- The 1kΩ stated RL is not shown in the schematic. In inverting mode, the feedback resistor is also part of the load. If the 1kΩ RL were added in parallel with CL, the total DC load will be 1kΩ||1kΩ = 500Ω. Compare that ±10 mA peak output current to the headroom increase vs output current to confirm the test waveform is well away from clipping – as it is here with those ±18V supplies.
- This output immediately enters a slew limited condition giving an easy line fit across the transition. That dV/dt is faster (8V/310nsec = 26V/μsec) on the rising edge here than the falling (6V/330 nsec = 18V/μsec) edge. The OPA192 specifications calls out a gain of +1V/V slew rate of 20V/μsec with no corresponding curve. Because most positive-going transitions have a negative going one as well, designers should probably use the minimum edge rate for design.
- The inverting slew rate is always faster than the non-inverting slew rate because there is no common-mode voltage swing required across the input stage. This inverting plot is best case and a non-inverting gain of +1V/V should be slower (no plot). Operating at higher non-inverting gains will reduce the required common mode input swing for the same output swing, moving the slew rate limit closer to the output limited inverting mode slew rate.
- This inverting gain of -1V/V is a noise gain (NG) of 2V/V. The resulting closed loop SSBW of ≈5MHz from its 10MHz GBP will ask for an output transition rate far exceeding the available slew rate once the output step becomes large enough. This typical case for higher supply, precision VFAs puts the large signal step into slew limiting immediately. This largely slew limited test case is rarely used for the wide range of lower swing, higher slew rate, higher speed op amps and fully differential amplifiers (FDAs).
- You usually see a little bit of pre-shoot in the inverting mode if the input edge is fast enough. That is the positive spike at the beginning of the negative going edge. This is the input signal feeding straight through to the output before the op amp’s output starts to move.
The clearly slew limited output of Fig. 1 is the simplest case. Many more applications provide an SSFR that may, or may not, slip over into slew limiting on a portion of an output step.
Peak dV/dT vs. slew rate specifications for single pole bandlimited VFA designs.
Operating a unity-gain stable VFA at higher gains will band limit the small signal response giving an approximate single pole response. A common approach is to consider the 10% to 90% rise time on a first-order response as a measure of output slew rate requirements. While perfectly accurate for the transition of Figure 1, that is largely in a slew limited condition, this approach yields poor results for linear output steps. A few simple equations will show this result.
The ideal single pole 10% to 90% transition time (Δt) is given by Equation 1.
Dividing this time into 80% of the output VSTEP gives this 10% to 90% “slew rate” on a linear response (Equation 2).
The single-pole step response has, however, a simple solution for its peak dV/dt at time = 0 shown in Equations 3 and 4 where τ ≡ 1/(2πF-3dB). Equation 3 shows the standard single pole step response.
Solving for the peak dV/dT from this starting equation gives the simple Eq. 4.
For a linear first-order step response, the peak dV/dt at t=0 is far higher than the 10% to 90% line fit. If most of the transition is slew limited, as in Fig. 1, then that “risetime” fit is quite accurate for slew rate. If the step response does not push into slew limiting for most of the transition, then the 10% to 90% slope is always lower than the actual peak dV/dt. In fact, the peak dV/dt for a non-slew limited first-order linear output step would be 2π/2.29 = 2.74 times the line fit slope.
Let’s illustrate these results with a recently updated model for the dual audio OPA1678 VFA (Ref. 2). Operating this true GBP = 17.5MHz (Ref. 3) at a non-inverting gain of +4V/V gives the loop gain (LG) response of Figure 2. Here, the LG=0dB crossover frequency at 4.36MHz shows 80 degrees phase margin.
This 80 degree phase margin should extend the F-3dB frequency by 1.21×FXOVER (Figure 3, Reference 3) to 5.28MHz. Running the Av=+4V/V closed loop simulation shows the expected F-3dB and a second pole (indicated by -135 degree phase shift) at 32.4MHz. This second pole will be used later to improve the estimate for the peak dV/dt in a non-slew-limited output step response.