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Serializer/deserializer squashes power consumption, needs no external clock, provides dual display interfaces

South Portland, Maine–Serial links offer potential advantages over parallel links in terms of cabling, connectors, and layout complexity, but often require parallel-to-serial format conversion at the source and the complimentary operation at the receiver. Fairchild's FIN324C ultra-low-power series of Serializer/Deserializer (SerDes) ICs operate with just 4 mA of current at 5.44 MHz, and are housed in a space-saving BGA (3.5×4.5 mm, 0.4 mm pitch) or MLP (6×6 mm) packages.

Targeted primarily at cellphones and similar products with dual displays (one external, one internal), the dual-port devices have a microcontroller interface as well as multiple SPI ports. They operate from 1.6 to 3.0 V supplies. They support 12-bit and 24-bit operation, and reduce the 12 or 24 LVCMOS signals in most cellphones to high-speed, differential signals, cutting the number of interconnect leads by as much as 6:1. These SerDes devices are designed to generate minimal EMI of -110 dBm, which the vendor claims is 30 dB lower than traditional LVDS signals, critical in such close-proximity applications. Susceptibility to radiated signals is also lower by at least 35 dBm, due to the current sense receiver and differential signaling topology. They also provide 15 kV of ESD protection.



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The unique design reduces power and footprint requirements by implementing an architecture which eliminates the need for an internal phase lock loop (PLL) and need for an external clock. Prices begin at $1.66 (1000 pieces) for the MLP version. Read the data sheet by clicking here.

Fairchild Semiconductor Corp., www.fairchildsemi.com.

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