Providing critical functions for professional broadcast video streams operating at up to 3 Gbps (called “3G”, and completely different from the cellular 3G standard), National Semiconductor has introduced a serializer/deserializer pair of ICs. Consisting of the LMH0340 3G serializer with integrated cable driver, and LMH0341 deserializer with reclocked serial loop-through, the pair provides industry's lowest output-jitter SDI serializer (50 ps) and highest input-jitter-tolerance deserializer (0.6 units interval).
The serdes pair supports the new Society of Motion Picture and Television Engineers (SMPTE) 424M specification for uncompressed serial transmission of 1080p high-definition (HD) broadcast video signals up to 60 frames per second. The chipset's architecture uses a proprietary technique to reduce the parallel bus between the serializer and FPGA from a 20-bit single-ended interface to a 5-bit low-voltage differential signaling (LVDS) interface, thus simplifying board layout by reducing the number of traces between the serializer, deserializer and FPGA. In addition, the chipset's LVDS reduces electromagnetic interference (EMI), and the narrow parallel bus allows a single,low-cost FPGA to support a greater number of high-speed video channels.
The LMH0340 3G HD/SD serializer/driver , in a 48-pin LLP package, supports 270-Mbps, 1.485-Gbps and 2.97-Gbps data rates, enabling transmission of digital video broadcasting-asynchronous serial interface (DVB-ASI), standard-definition (SMPTE 259M), high-definition (SMPTE 292M) and the new 3G SDI standard (SMPTE 424M) for uncompressed serial transmission of 1080p50/60 signals over a single link of coaxial cable. At 3G and HD rates, it delivers the industry's lowest output jitter of 50 ps, without the use of an external voltage-controlled oscillator (VCO). The serializer and driver typically dissipate 437 mW of power, 40 percent less than existing HD solutions which require a serializer and an external driver.
The complementary LMH0341 3G HD/SD reclocking deserializer , also in a small 48-pin LLP package (60 percent smaller than competitive HD products), supports DVB-ASI at 270-Mbps and SDI for SD, HD and 3-Gbps data rates. Its integrated reclocker provides a wide input jitter tolerance of 0.6 unit intervals (UI), allowing the product to receive and deserialize signals with more than 60 percent of the signal's “eye” closed. The reclocked loop-through feature includes an integrated cable driver that automatically adjusts the output slew rate compliant to the incoming data rate. Like the LMH0340, it requires no external VCO. At 2.97 Gbps, typical power consumption is 445 mW, approximately half that of competitive devices operating at HD rates.
Pricing and availability: the serdes pair will begin sampling in 3Q 2007. In 100-piece orders, the LMH0340 is $37, and the LMH0341 is $40. For more information, go to www.national.com/appinfo/interface/sdidt.html.
National Semiconductor Corp. , www.national.com