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Signal chain basics #124: Understanding VCOs integrated on silicon

It’s becoming more common to integrate voltage-controlled oscillators (VCOs) on the same semiconductor chip as the rest of the phased locked loop (PLL). This integration introduces some differences in the VCO’s architecture and behavior that are worthwhile to understand.

Architectural differences between discrete and integrated VCOs

A VCO converts the input voltage into a frequency. In a traditional VCO, there is a 1-to-1 relationship between the input voltage and output frequency, as there is only a single band. The VCO gain is defined as the slope of the tuning curve and is typically expressed in megahertz/volt, as illustrated in Figure 1. A classic problem with VCO design is that a broad tuning range implies a higher VCO gain, which in turn implies worse phase noise.

Figure 1

Traditional VCO turning curve

Traditional VCO turning curve

With the introduction of VCOs integrated on silicon, it is a common approach of semiconductor manufacturer to divide the frequency range into many different bands, as shown in Figure 2. This allows the VCO to cover a broad frequency range while having a low gain constant, yielding excellent phase-noise performance.

Figure 2

Division of frequency range into multiple bands.

Division of frequency range into multiple bands.

There are two ways to get multiple bands. The first way is to have a bank of switched capacitors that can be used to adjust the center frequency of the VCO. This approach can yield a fairly wide tuning range for the VCO, but it is typically not wide enough to cover a factor of two in the tuning range. For this, it is necessary to form multiple VCO cores by switching in multiple inductors. As an example, the Texas Instruments LMX2581 PLL has four VCO cores. Each core has 256 bands within it, which yields a total of 1,024 frequency bands.

VCO digital calibration time

Changing the frequency for a VCO integrated on silicon typically entails running a calibration routine to find the optimal frequency band. Once the routine finishes, the VCO will be at the correct band and close in frequency, although typically off by several megahertz. From this point, the PLL will settle the final frequency error in the regular analog fashion. One natural question is how long this calibration routine takes: the answer depends on the device and how it is used. As a general rule of thumb, it is faster for a higher-input reference frequency, although that is only true to a point – if the frequency is too high, internal dividers may divide it down. There may also be settings that can speed up the calibration time. Figure 3 shows the LMX2581 calibration time improving from 125 us to less than 10 us by assisting the VCO with a starting frequency band that is close to the final value.

Figure 3

VCO calibration with assistance for the LMX2581

VCO calibration with assistance for the LMX2581

VCO calibration can either help or hurt the overall lock time. If the PLL loop has a slow settling time relative to the VCO calibration time, then the calibration improves the lock time, as it gets the frequency close. If the PLL loop has a faster settling time than the calibration time, then the VCO calibration typically slows the overall lock time.

Performance consistency of performance

Another common question about integrated VCOs is what happens when the frequency is on the boundary of two of the bands. These bands need to have a good amount of overlap to account for the possibility of the temperature drifting without the VCO having the opportunity to recalibrate. Consider a frequency of 2,100MHz which could be created with the higher range of the lower frequency band or the lower range of the higher frequency band as shown in Figure 4.

Figure 4

VCO band choice example

VCO band choice example

If the lower frequency band is used, the VCO gain will typically be higher than if the higher frequency band was used. The difference in VCO gain between the different bands leads to slight differences in the loop bandwidth, which will therefore have some small impact on phase noise. If a frequency is at the boundary of two VCO cores with different inductive element, then this effect could be more pronounced.

The calibration routine may favor one band over another based on conditions. For instance, the lower band may be preferable if the starting VCO frequency before calibration was 2,000MHz. The upper band might be preferable if the starting VCO frequency was 2,200MHz.

Some integrated VCOs allow you to specify the starting VCO core and band, which you can also use to optimize performance and have more consistent phase noise and spurs. Differences between bands for an integrated VCO should not be a source of major concern, as performance for any VCO (discrete or integrated) varies as the output frequency changes.

Conclusion

VCOs integrated on silicon offer a very wide tuning range and excellent performance. They typically have a different architecture than discrete VCOs and involve calibration routines. These routines are typically automatic and may be transparent to the user, but they can have some observable effects. Many aspects of these VCOs may be complicated or even proprietary, but I encourage you to try the PLLatinum simulator tool, which can model VCO calibration time, phase noise and gain changing as a function of output frequency.

Author bio

Dean Banerjee is an applications engineer with over 20 years’ experience working with phased-locked loops. He holds master’s degrees in Electrical Engineering and Applied mathematics and is the author of “PLL Performance, Simulation, and Design”.

1 comment on “Signal chain basics #124: Understanding VCOs integrated on silicon

  1. RituGupta
    February 26, 2019

    The topic does seem a little too extensive at first but with deep interests, you find that the flow of the subject is rather uncomplicated. The more you read up, the easier the topic gets. It is important to first understand where the whole concept is coming from in order to prevent confusion. It gets really easy to dwell for too long on a single factor since each topic is way too broad.

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