# Signal Chain Basics #127: Estimating the total noise in a SAR ADC acquisition system

When designing circuits with precision analog-to-digital converters (ADCs), you must carefully consider the noise contribution of all components in the signal chain, including noise from the driver amplifier, noise from the reference and noise from the ADC. In this article, I will discuss how to estimate the overall system noise for a successive-approximation-register (SAR) ADC acquisition system.

Figure 1 shows an example of a fully differential SAR ADC acquisition system. The system consists of a fully differential amplifier (FDA), a voltage reference and a 20-bit SAR ADC incorporating an internal reference buffer.

Figure 1 Fully differential SAR ADC data-acquisition system.

The signal-to-noise ratio (SNR) is a parameter that specifies the noise performance of an ADC; it is the ratio of the root-mean-square (RMS) value of the fundamental signal amplitude to the ADC’s RMS noise. The SNR is generally given in product data sheets in decibels (dB). Equation 1 shows the SNR as a function of the full-scale amplitude and the noise of the ADC: where VFSR is the RMS value of the full-scale range of the device and VN_ADC is the noise of the ADC in VRMS .

In order to combine the noise contribution from all of the components in the signal chain, you must translate the SNR (dB) specification into the ADC-equivalent RMS noise. For the fully differential ADC example shown in Figure 1 , the full-scale range is +/-VREF , or 10Vpp . To convert the full-scale voltage to RMS, divide the peak-to-peak value by 2 and multiply by 0.707. Using Equation 1, the ADC’s SNR specification and the full-scale RMS value, you can calculate the equivalent RMS noise of the ADC by solving for VN_ADC in Table 1 .

Table 1 RMS noise calculation for a fully differential SAR ADC.

Estimating the FDA and reference total noise using simulation

You can estimate the noise contribution of the FDA driver by using a simulation tool like TINA-TI SPICE software. Before performing noise simulations, it is important to verify that the amplifier SPICE model includes the noise characteristics. The netlist of the TINA-TI macro model includes a listing of the modeled parameters. To access the netlist of the TINA-TI model, click the macro.

Noise simulations require biasing the amplifier within its linear range of operation; therefore, it is useful to test the DC operation of the FDA. The VOCM pin is set to VREF /2 or 2.5V to bias the differential output common-mode voltage. Performing a DC simulation by selecting DC Analysis > Calculate Nodal Voltages confirms that the FDA outputs are at 2.5V. An AC differential source must be connected to the FDA circuit inputs. This differential source is implemented using two voltage-controlled voltage sources (VCVSs) with a common mode of 2.5V at the FDA inputs. Figure 2 shows the noise TINA-TI simulation circuit for the FDA.

Figure 2 TINA-TI noise analysis of the FDA circuit.

To perform the noise simulation, run Analysis > Noise Analysis. Enter a frequency range a decade beyond the bandwidth of the circuit to allow the integrated noise to converge. In this example, the RC feedback components limit the amplifier’s bandwidth to about 159kHz; therefore, I selected 100MHz as the maximum frequency. Figure 3 shows the resulting integrated noise curve. Notice that the FDA integrated noise VN_FDA converges at 9.63 μ Vrms. This is the total amplifier RMS noise that I will use in the overall system noise calculation. For more information about noise analysis and simulation, see the TI Precision Labs – Op Amps: Noise – Lab video series.

Figure 3 Total integrated noise of the FDA circuit.

Performing a TINA-TI simulation of the total output noise of the reference circuit yields a total integrated noise of 3.75 μ V RMS. Figure 4 shows the total reference noise VN_REF in RMS. The TI Precision Labs – Calculating the Total Noise for ADC Systems video (You may have to register to view) has a detailed TINA-TI simulation example to estimate the total noise of a reference circuit.

Figure 4 Total integrated noise of the reference circuit.

Performing the root-sum-square (RSS) of each circuit component’s integrated noise provides an estimate of the total overall system noise (Equations 2 and 3): Replacing VN_ADC with VN_SYS using Equation 1 yields the overall SNR performance in dB for the complete acquisition system (Equation 4): Alternatively, you can use TI’s newly developed “Analog Engineer’s Calculator.” This beta tool performs the system noise calculation after you fill in the ADC specifications and noise simulation results.

Figure 5 Analog engineer’s calculator.

Now that I’ve walked you through the SAR ADC’s noise calculations and how to estimate the total noise of the components in the signal chain, you should be able to predict the overall noise performance of a SAR acquisition system.

## 1 comment on “Signal Chain Basics #127: Estimating the total noise in a SAR ADC acquisition system”

1. markgrogan
February 21, 2019

These guidelines are what matter at the end of the day to ensure that your setup works the way you would want it to. Noise is always the underlying issue which you would have to counter and it takes great knowledge to know where to begin and end. It has to start and end somewhere and this isn't something you would want to take lightly.

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