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Signal Chain Basics #131: RF-sampling DACs for multiband transmitters

Recent advances in high-speed data converters now digitize or generate signals directly at radio frequencies up to several gigahertz, replacing traditional radio-frequency (RF) components like mixers, local oscillators (LOs) and amplifiers. In addition, the inherent wide-bandwidth capabilities of RF-sampling data converters with multiple gigasample-per-second (GSPS) speeds are enabling radios that combine multiple bands for cellular infrastructure applications. The resulting smaller and lower-power systems can ultimately reduce the number of remote radio head (RRH) boxes at each cell site. This article focuses on the transmitter (downlink) using an RF sampling digital-to-analog converter (DAC); my next article will cover the receiver (uplink).

Figure 1a shows a traditional signal chain with a zero-intermediate frequency (IF) architecture. A dual DAC generates a complex analog signal, which is upconverted with an analog quadrature modulator and LO to RF. Figure 1b shows an RF sampling architecture – while the end functionality is the same, in this case the quadrature modulation occurs digitally by mathematically mixing the complex signal with a numerically controlled oscillator.

To add a second band in a zero-IF architecture, you could either combine the two bands digitally, which would require a very high bandwidth baseband signal (which becomes impractical for bands separated more than ∼ 300MHz due to quadrature [IQ] mismatches), or you’ll need a second signal chain.

Figure 1a

Figure 1a

Figure 1b
Figure 1 Zero-IF (a) and RF sampling architectures (b)

Figure 1b

Figure 1 Zero-IF (a) and RF sampling architectures (b)

In comparison, RF sampling only requires a second digital upconverter (a relatively small circuit in advanced complementary metal-oxide semiconductors [CMOS] processes) to generate a signal added before the DAC block. You can easily add additional bands in RF sampling by increasing the number of digital upconverters.

Of course, RF sampling would not be attractive if performance and power dissipation were worse than they are for a zero-IF architecture. As CMOS process technology has increased the speed and lowered the power of digital circuits, RF-sampling DACs now have similar performance at lower power than traditional architectures.

Table 1 compares a two-transmitter system consisting of a zero-IF architecture with RF sampling. The traditional architecture comprises TI’s DAC38J84, TRF3722 and TRF3705 (values taken from the TSW38J84 reference design user’s guide), while RF sampling uses the DAC38RF83, a dual-channel, 9GSPS DAC. As a benchmark for dynamic range, the architecture uses adjacent channel leakage ratio (ACLR) and alternate ACLR (alt-ACLR) for a 3.84MHz wideband code division multiple access (WCDMA) signal (a higher number is better).

Table 1

Comparison of zero IF and RF sampling at 1.8GHz

Comparison of zero IF and RF sampling at 1.8GHz

Even with the assumption that you could optimize the zero-IF architecture size, there is a huge savings in size and power with similar or better performance. With three or four bands, the advantages are even larger.

Figure 2 is an example of the DAC38RF83 output spectrum transmitting 20MHz Long-Term Evolution (LTE) signals in Third-Generation Partnership Project (3GPP) bands 1, 3 and 7. The signals span 830MHz.

Figure 2

Three 20MHz LTE carriers, one each in 3GPP bands 1, 3 and 7

Three 20MHz LTE carriers, one each in 3GPP bands 1, 3 and 7

Although RF-sampling DACs can generate multiband across several gigahertz of bandwidth, there are some limitations for multiband radios. The primary limitation is the bandwidth and efficiency available in the power amplifiers (PAs) commonly used for RRH systems. Recent advances in gallium nitride (GaN) have provided progress such that PAs can now cover bands separated by 300-400MHz, with future PAs allowing up to a gigahertz of separation.

Stay tuned for the next Signal Chain Basics article, with advice on working with data converters, amplifiers, interface or other analog design challenges.

About the author

Robert Keller is a systems manager in TI’s Wireless Infrastructure group. He has 15 years of experience supporting high-speed products in wireless infrastructure communication, test and measurement, and military systems. He received a bachelor’s degree in physics and mathematics from Washington University in St. Louis, Missouri, and a Ph.D. in applied physics from Stanford University. He has 10 U.S. patents in networking and sensor applications. You can reach Robert at robertkeller@list.ti.com.

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