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Digital isolators, when applied in harsh industrial environments, can experience large voltage differences across the isolation barrier due to high-common-mode-voltage transients. In the case of capacitive isolators, these transients apply a large electric field to the silicon dioxide (SiO2 ) inter-dielectric of the isolation capacitor, which stresses the lattice structure enormously. The amount and duration of electrical stress applied to an isolator affect its life expectancy, and as such is of high importance to any system designer using digital isolators.
An isolator’s life expectancy or time-to-failure is established by measuring its time-dependent dielectric breakdown (TDDB), an important failure mode for dielectric materials such as silicon dioxide.
Due to impurities and imperfections arising from manufacturing, dielectrics deteriorate over time. Applying an electric field at high temperature across the dielectric accelerates this deterioration. The E-model, the most widely accepted model for dielectric breakdown, defines the time-to-failure (TF) as a logarithmic function of the electric field and the temperature. By taking the TDDB data at worst-case temperature, the temperature dependency disappears, resulting in a simple, exponential equation:
where TF is the time-to-failure, or life expectancy in years, A is a constant, b is the acceleration constant, and VISO is the isolation voltage in volts.
Establishing the time-dependent dielectric breakdown requires the application of a stress voltage across the isolator, while maintaining the ambient temperature at the highest specified temperature of 150 °C (Figure 1 ). A timer circuit activates the test event and stops it when a sudden increase in current flow occurs.
This indicates the beginning of a temporary, local breakdown within the dielectric, without destroying the dielectric. Over the duration of the test, the time-to-failure and the breakdown voltages are recorded, then plotted against the theoretical E-model curve.
Figure 1: TDDB test methodology.
Figure 2 shows the result of a long-term TDDB test, plotting the life expectancy as a function of the isolation voltage in a semi-logarithmic diagram. Here the life expectancy for capacitive isolators, at the UL-specified working voltage of 400 Vrms (560 Vpk ) for basic isolation, is given with 28 years; thus, evidently exceeding typical semiconductor life expectancies of 10 to 20 years.
Figure 2: Life expectancy of capacitive isolator
(Click on image to enlarge)
The often-raised question, whether an AC or DC originated E-field presents a higher stress level on the dielectric, is answered with the rather intuitive example in Figure 3 . Here the SiO2 lattice is resembled by spheres, which are attached to another through elastic strings. While Figure 3a shows the lattice at rest, Figure 3b demonstrates the application of a DC voltage across a dielectric by pulling the upper Si-sphere to its maximum extend in the direction of the arrow. While there is a force working on the connecting string, the lattice can be kept in this position until fatigue sets in and the strings break.
Figure 3: DC versus AC E-field example
In Figure 3, the sphere lattice is pushed and pulled, resembling an AC field. In this case, elastic fatigue occurs earlier in time than in 3b. This is equivalent to the earlier wear-out stage of a dielectric when stressed by electric AC fields.
High-Voltage Lifetime of the ISO72x Family of Digital Isolators, Texas Instruments, Application Report, slla197, January 2006.
About the Author
Thomas Kugelstadt is a Senior Applications Engineer at Texas Instruments where he is responsible for defining new, high-performance analog products and developing complete system solutions that detect and condition low-level analog signals in industrial systems. During his 21 years with TI, he has been assigned to various international application positions in Europe, Asia and the U.S. Thomas is a Graduate Engineer from the Frankfurt University of Applied Science.