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SIGNAL CHAIN BASICS #61: Clock jitter demystified-random jitter and phase noise, Part 2

Editor's note : Signal Chain Basics is an ongoing and popular series; click here for a complete, linked list of all installments.)

In Signal Chain Basics Part 56 we discussed the fundamental relationships between jitter and phase noise. Now in Part #61, we discuss practical aspects of jitter transfer and capabilities as well as the limitations of phase noise measurement techniques.

Clock jitter and edge rate

Figure 1 shows three waveforms represented by a generic equation. The equation includes a phase noise term “f(t)” and an amplitude noise term “?(t). ” For each of the three frequencies evaluated, f(t) = 0 and ?(t) is a pseudo random function generating a constant envelope of noise for each waveform.

    Figure 1 illustrates an exploded view of the crossing of Vth for each of the three waveforms, along with distributions of locations where Vth could be crossed.

 

Figure 1: Time-jitter induction versus signal-edge rate

(click here to enlarge).

Figure 1 emphasizes that noise sources other than intrinsic jitter can cause timing jitter errors. Faster edge rates diminish the effect that voltage noise on a clock signal has on clock jitter performance. This phenomenon is not solely a characteristic of the clock signal. Rather, this mechanism is apparent in devices that receive the clock signal or measure jitter performance.

Clock performance measurements

Engineers often evaluate lab results that don’t make sense; and clock performance measurement is particularly problematic. For example, you can use an oscilloscope and a phase noise analyzer (PNA) to measure random jitter. However, the results are sometimes radically different. To better understand these results, a few experiments are identified in Figure 2 . The results are tabulated in Table 1 .

 

Figure 2: Random-jitter measurement experiments

(click here to enlarge).


 

Table 1: Results of random-jitter measurement experiments from Figure 2.

For example, the ONET1191P is a limiting amplifier which is optimized for high-speed applications. We used this amplifier to decrease the rise and fall time of the clock signal, which in this case is from about 200 ps to 35 ps.

Notice that the application of this amplifier has different results for the scope versus the PNA. The PNA results are as expected (for example, adding the limiting amplifier (LA) adds noise). However, the LA improves the results delivered by the oscilloscope significantly.

Conclusion

These results are related to the edge rate and jitter transfer mechanism shown in Figure 1. Instead of the clock signal containing the noise component, the front end of the oscilloscope provides the noise (error) source. Equation 1 shows an expression for the jitter noise floor of an oscilloscope. It comprises the jitter of the scope’s time base, the noise of the scope’s front end (Vnoise ), and the slew rate of the signal under test.


Equation 1: Oscilloscope jitter noise floor.

Please join us next month when we will show you how to design your own simple I2 C isolator.

References

For more information about clock solutions from TI, visit: www.ti.com/clocks-ca.

About the Author

John Johnson is the Manager of Market Development and Systems Engineering for the Clocks and Timing Group of Texas Instruments. John has 30 years of experience in the electronics industry and has worked in the fields of product development, marketing, systems engineering, and business management. He holds a MSEE from Purdue University.





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