SIGNAL CHAIN BASICS #62: Design your own simple I2C industrial interface isolator

Editor's note : Signal Chain Basics is an ongoing and popular series; click here for a complete, linked list of all installments.)

Times are tough and money for new product designs is hard to come by. Nevertheless, we are still required to design robust systems for harsh environments without increasing cost. Often this requires incorporating galvanic isolation that protects sensitive control electronics against nasty burst and surge transients from the outside world.

If your designs involve industrial interfaces, sweeping through the websites of semiconductor vendors can make you feel like a “kid in a candy store” when spotting all the specific signal isolators for RS-485, RS-232, CAN, and I2 C. However, your purchasing manager’s response, when asking him for approval to acquire these beauties, brings you down in an instant: “Can’t you use the standard components you already have and make them work – somehow?”

Your answer can be an enthusiastic YES as this article provides you with a small collection of industrial interface circuits almost all of which using only one standard isolator. Figures 1–4 show the simplified schematics of the most common digital interfaces in industrial applications.


Figure 1: Isolated RS-485 bus interface

(click here to enlarge).

Figure 2: Isolated CAN bus interface

(click here to enlarge).

Figure 3: Isolated RS-232 line interface

(click here to enlarge).


Figure 4: Isolated I2 C bus interface for multi-master applications

(click here to enlarge).

Note that bypass capacitors and pull-up/down resistors have been omitted for the purpose of clarity. The first three circuits have in common an asynchronous data transfer mode using two data lines and one control line for driver / receiver enable/ This requires only a triple isolator between the node controller and a standard compliant transceiver chip.

The isolated I2 C or inter-integrated circuit (IIC) interface in Figure 4 presents a special case as it supports short communication links of a few inches only, so does not require a line transceiver. In multi-master applications, two nodes might access the bus at the same time. Then in order to prevent a signal from being looped-back to its source, a bidirectional buffer is used to support receive traffic from R(x,y) to S(x,y) and in transmit from S(x,y) to T(x,y) , but not a direct loop-back from R(x,y) to T(x,y) .

Fortunately, multi-master designs are in the minority and the lion’s share lies with single-master applications. For these, we can simplify the circuit in Figure 4 significantly.

Because of the single-master the clock signal (SCL) needs to go in one direction only, which reduces the clock isolation to one channel. Then replacing the bidirectional buffer with a transistor-diode switch, each side of the isolation barrier (Figure 5 ) reduces the circuit down to our standard triple isolator (Figure 6 ).

Figure 5: Separating transmit and receive path

with transistor switches

(click here to enlarge).

In idle mode, the isolator inputs A and C are pulled high via R2 and R4 , which drives the outputs B and D high. Also, the master and slave data lines (SDA1 and SDA2) are pulled high via RPU1 and RPU2 . When the master initiates communication by pulling SDA1 low, the base-emitter junction of Q1 is forward biased and Q1 conducts pulling input A low.

Output B follows low and forward biases D2. D2 conducts and pulls SDA2 low. At the same time the base-emitter junction of Q2 is reverse-biased and Q2 remains high-impedance. The same switching sequence applies, only in opposite direction when the slave responds.

Figure 6: Isolated I2 C bus interface for single-master applications

(click here to enlarge).

Figure 6 shows the final circuit. Use at least 0.1µ F capacitors to buffer the chip supplies. Always connect enable input to the respective supply rails via 1k? to 10k? resistors. These resistors limit currents into the chip due to surge transients that might infiltrate the supply lines. Follow good analog-design practice by applying filter capacitors (here, 220 pF) to sensitive CMOS inputs noise free.

No isolation design is complete without the necessary isolated power supply . Figure 7 provides a low-cost, isolated DC/DC converter design that replaces expensive, integrated DC/DC modules. Both, primary and secondary supply can vary between 3.3V and 5V; and Table 1 lists the appropriate components for the three possible supply combinations.


Figure 7: Isolated DC/DC converter

(click here to enlarge).

Please join us next month when we will cover how to design a low -power, high-accuracy PID temperature-control loop using SPICE.

About the author

Thomas Kugelstadt is Applications Manager at Texas Instruments where he is responsible for defining new, high-performance analog products and developing complete system solutions that detect and condition low-level analog signals in industrial systems. During his 22 years with TI, he has been assigned to various international application positions in Europe, Asia and the U.S.

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