For data acquisition systems that require the highest precision dynamic performance, integral nonlinearity (INL) can become a contributing error factor when offset, gain, and noise are removed through calibration and averaging. But what effect does the differential nonlinearity (DNL) of the analog-to-digital converter (ADC) have on the overall system errors?
To start, INL can be degraded by non-idealities introduced by limitations in common-mode rejection ratio (CMRR), slew rate, and settling from the signal chain preceding an ADC. Unlike INL, DNL is only affected by the internal design of the ADC. DNL is the result of internal capacitor mismatch, dielectric absorption and leakage, settling, as well as internal reference settling, and comparator performance.
DNL is defined as the difference between two adjacent codes minus 1 least significant bit (LSB). Therefore, if the ADC transfer function is perfect, the step difference between codes is 1 LSB. This results in a DNL error = 0. Mathematically, if S(i) is the ADC transfer function at a single code (i) and VLSB is the ADC’s LSB, DNL can be defined as the discrete derivative of the ADC transfer curve normalized to 1 LSB (equation 1):
In an endpoint calibrated ADC transfer function, the width of each individual code may vary. Figure 1 illustrates these differences. However, because offset and gain are assumed to be calibrated, there is no non-linearity at the end-points of the ADC transfer function. Hence, the sum of the total DNL widths remain constant at the positive full scale code (equation 2):
Figure 1 also illustrates that DNL can directly affect the INL error because a large code width can shift the transition point further off the gain curve But does this necessarily imply that a large code needs to be immediately followed by a successive small code? Not necessarily. Instead of a single negative code, the ADC can accumulate negative DNL on several codes against positive DNL on a single code. Therefore, it is possible for an ADC to have no missing codes and still have an asymmetric DNL specification (for example: –0.99 to 1.5 LSB).
In most cases the INL and DNL maximum are better than the uncertainty added by the typical DC (transition) noise specification (Figure 2). If the typical DC noise is specified at 0.7 LSB (RMS) as an example, the peak-to-peak noise will be somewhere between 4 and 5 LSBs. This is almost three times the maximum DNL specification. This noise can be reduced by square-root of n through averaging, where n is the number of averages taken for a given sample.
For both static and dynamic precision measurements, the ultimate goal is to optimize the effective number of bits (ENOB) for a given input. DNL affects the INL which can cause THD degradation. This can result in harmonic tones created by passing a sine wave through a nonlinear transfer function. DNL also causes abrupt transitions in the transfer function in the time domain. This results in higher order harmonics that can affect the signal-to-noise and distortion (SINAD), which directly impacts the ENOB in Equation 3.
In summary, the ADC DNL can affect the monotonicity and errors in a DC transfer function. It can play a role in degrading dynamic specifications such as signal-to-noise ratio (SNR), THD, and SINAD in a precision data acquisition system. Ultimately this can result in lower ENOB and a decrease in overall system precision.
Please join us next time when we will address fully differential amplifier basics and single end to differential applications.
— Matthew Hann, Texas Instruments
- Moscovici, Alfi. High Speed A/D Converters. Kluwer Academic Publishers. 2001.
- Pallet, Dominique and Machado da Silva. Dynamic Characterisation of Analogue-to-Digital Converters. Kluwer Academic Publishers, Dordrecht, The Netherlands.