This two-part Signal Chain Basics post is brought to you by Dean Banerjee, an applications engineer for TI's Signal and Data Path Solutions Business Unit. Part one can be found here.
Current consumption, jitter, and cost
A good way to illustrate the tradeoffs is to consider the case of generating 10 LVDS outputs at 625 MHz from a 25 MHz input. In this example is the TI Clock Architect, which comes up with the following solutions (Figure 3). Figures 4a, 4b, and 4c show the top three solutions in more detail and uses the tool's full simulation capabilities.
Figures 4a, 4b, and 4c show the clock architect with three different solutions, depending on your needs.
Comparing these solutions, we see that one is optimal for cost, one is optimal for current, and one is optimal for jitter. The low cost of the CDCM61001 drives its solution cost down. The good PLL noise of the LMK03806B drives its jitter down, and the low PLL current, as well as the fact that it only uses one divider, drives the current down for the LMX2531 solution.
Crosstalk and routing considerations
When a single device generates multiple frequencies, crosstalk can be a serious consideration, if multiple frequencies are produced by the same device. For applications demanding very low crosstalk, it may make sense to do the division external to the main chip (Figure 5a), as opposed to using a single-chip solution (Figure 5b).
Sometimes using multiple devices, as shown above, make sense for routing. For instance, this might be the case if the 1,250 MHz clocks are on one side of the board, and the 312.5 MHz clocks are on another side of the board.
This article discussed some of the considerations of using multiple devices in clock trees compared to single-device solutions. The reader is encouraged to visit the new TI Clock Architect tool mentioned in the references to help explore these tradeoffs involved and to create their own comparison.
Please join us next time, when we will discuss understanding harmonic distortion in high-speed data converters.
For more information, visit clocks and timers from TI.
Check out TI's Clock Architect tool.