Microcontrollers (μCs) often contain a comparator that can implement a precise analog-to-digital (A/D) converter (ADC) with the addition of only an external resistor and capacitor. It is a charge-balancing or Σ- Δ (or Δ -Σ) ADC. The basic scheme uses a comparator which outputs μC input bit IN and requires one μC output bit, OUT. The circuit is shown below.

In μC software, the ADC routine is best implemented as an interrupt routine, driven by a timer of period *t _{INT} * , the interrupt period. In the circuit above, the ADC reference voltage is the μC supply (

*V*=

_{R}*V*). This assumes that the μC has CMOS output bits, so that the outputs for negligible current are near the rails:

_{CC}If greater accuracy than *V _{CC} * is required, instead of driving

*R*directly from OUT, use it to switch accurate analog switches between reference ground (for 0) and an accurate

*V*(for 1). If the OUT-bit voltage levels are close enough to the rails and the μC is low in power use, then an accurate

_{R}*V*can be supplied by the reference voltage source,

_{CC}*V*.

_{R}**Σ-Δ RC Constraint for n -Bit Accuracy**

The charge-balance voltage waveform on the capacitor is a constant voltage with a small up-down exponential ripple riding on it at the frequency that OUT switches. If this varying voltage becomes too large, the ADC will not be linear enough for *n* -bit conversion. The larger the RC time constant, the smaller the ripple. How large must *R* x *C* be made to ensure *n* bits of linearity? Large enough so that the ripple voltage, Δ*v _{C} * =

*v*–

_{H}*v*≤

_{L}*v*= 2

_{LSB}^{-n}x

*V*. Then

_{R}where *v _{H} * and

*v*are the maximum and minimum values of the

_{L}*v*ripple. At full-scale,

_{C}*v*=

_{H}*V*and

_{R}or solving for *R* x *C* and applying the approximation, ln(1 + *x* ) ≈ *x* for *x* << 1,

For *t _{INT} * = 1 ms, and

*n*= 8 bits, then

*R*x

*C*≥ 256 ms. For

*n*= 10,

*R*x

*C*≥ 1.024 s. The allowable measurement rate is comparable to DMMs. Multiple conversion values of

*N*can be used in a running average so that the new averaged values occur at a higher rate once the initial set of values has been acquired.

_{X}**Σ-Δ Algorithm**

The ADC algorithm, coded as part of the interrupt routine, sets or clears OUT to keep *v _{C} * =

*v*. In other words, charge balance is maintained on

_{X}*C*so that Δ

*q*= 0. This can be expressed using Δ

*q*=

*i*x Δ

*t*= (

*v*/

*R*)· Δ

*t*:

or

where *N* is the number of *t _{INT} * cycles during the measurement. After

*N*intervals, the measurement ends, and the

*N*accumulated during this measurement interval is related to

_{X}*v*by

_{X}*N*and

*V*:

_{R}*N* is a software parameter and *V _{R} * =

*V*of the μC;

_{CC}*V*/

_{R}*N*is a constant that is computed once. For each interrupt, the following routine is executed:

0. *n* ← 0

1. If IN = 1: OUT ← 1; increment *N _{X} *

Else if IN = 0: OUT ← 0

2. Increment *n* . If *n* < *N* , go to 1.

At the end of the measurement, after *N* interrupts (or intervals of *t _{INT} * ), then execute the following routine:

3. *N _{X} * (out) ←

*N*Reset

_{X}*N*← 0

_{X}Because the algorithm is simple, it takes few μC cycles and can be iterated at a relatively high interrupt rate.

**Unmatched R_{U} and R_{L} **

A refinement that can be brought to the minimalist ADC is to account for different resistance values in series with the OUT switches. Let *R _{U} * be the series resistance when OUT = 1 (high) and

*R*when it is 0 (low). Then

_{L}Given the two switch resistance values, the measured voltage, as a fraction of the reference voltage is

This equation presents the onerous μ C task of division, despite the pre-calculated constant, *R _{L} * /

*R*. This refinement is best left for DSPs, which usually facilitate division. As μCs become like DSPs, this improvement becomes feasible to implement.

_{U}**Auto-Calibration**

A more elegant method of producing an accurate measurement without external reference switching can be applied to systems in which multiple channels are multiplexed into the ADC. If two additional MUX inputs are available and the ADC is linear, two-point calibration can be applied. Two reference voltages, which can be 0 V and *V _{R} * are applied to the ADC, resulting in

*N*(0 V) =

_{X}*N*and NX(

_{0}*V*) =

_{R}*V*. A plot of

_{R}*N*versus

_{X}*v*will then have two known points on it, corresponding to the known input voltages. The equation for the linear calibration function – graphically, a line – is

_{X}where the expression in parentheses is the slope of the line. In general, the offset voltage, *V _{os} * , can be of either polarity, requiring negative

*N*. To get around this, two precision resistors forming a divider from

_{X}*V*can provide instead a known accurate voltage of α x

_{R}*V*, where α is the attenuation ratio of the divider. For this more general case, the equation of the line can be written by equating slope expressions:

_{R}Solving for *v _{X} * ,

By making α= 1/2, then *m* must be divided by two, a right-shift instruction. To add 1/2 to it for a rounded division, increment *m* before right-shifting. The resulting number is the fraction of *V _{R} * that is v

_{X}.

**Inverting Σ-Δ ADC**

An inverting Σ- Δ converter uses one additional resistor, as shown below.

The RC time constant must still be much greater than *t _{INT} * . A low OUT is 0 V and a high level is

*V*= α x

_{CC}*V*. Charge balance on the capacitor is maintained by the ADC algorithm, keeping

_{R}*V*=

_{C}*V*. This results in Δ

_{R}*Q*= 0 C, or

Solving for the ADC transfer function,

For *R _{X} * =

*R*, and α = 2, then

_{R}The following chart summarizes the transfer function:

The interrupt routine for the ADC is

0. *n* ← 0

1. If IN = 1: OUT ← 0; increment *N _{X} *

Else if IN = 0: OUT ← 1

2. Increment *n* . If *n* < *N* , go to 1.

At the end of the measurement, after *N* interrupts (*N* intervals of *t _{INT} * ), then output

*N*and reset it:

_{X}3. *N _{X} * (out) ←

*N*

_{X} Reset *N _{X} * ← 0

**Closure**

These minimal-component ADCs are often adequate for slow, medium-precision, μC-based ADC requirements. Besides few components, other advantages of the Σ- Δ ADC is that it does not need an anti-aliasing filter or sample & hold circuit preceding its input. Its integrating function reduces noise bandwidth of the measurement. It is an optimal solution for many μC-based applications.

The inverting ADC input circuit could be extended to have a second-order, cascaded RC filter using the same software routine, with a total of 4 external resistors and 2 capacitors. This adumbration is left to the imagination of the reader. With sufficiently low *t _{INT} * , which is achievable on faster μCs and DSPs, high precision can be attained with a medium-performance comparator. By replacing the RC integrator with an external op-amp integrator, precision can be extended further.

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