Power-management technology has taken on an increasingly important role in portable and wearable electronics for system-on-chip (SoC) applications. That makes accurate design of power-management circuits important for extending the battery duration of the batteries in a SoC. Efficient power conversion of low voltage (LV) and high voltage (HV) devices is key.
Figure 1 shows some of the widely adopted structures in an integrated MOSFET for ICs with a high integration level.
As an example, look at the VDMOS transistor, which is based on a vertical flow of electrons between source and drain terminals through a N-doped epitaxial layer. After this initial path, the current flow deviates by a 90°, becoming a horizontal flow passing through the N+ doped substrate to the drain terminal.
There are many digital and analog design techniques for power management systems. One of the mostly adopted solution is represented by the switching voltage regulators, that are circuits converting a continuous voltage input to an output continuous regulated voltage, hence these regulators are called DC / DC switching regulators (SWRs). These type of regulators are widely used in energy management applications because of their high efficiency, the possibility of controlling effectively the output voltage, and the high driving capacity of the power MOSFET transistors whose are switched from the ON state to the OFF state through their gate terminal.
Figure 2 shows the basic scheme of a DC/DC switching buck or step-down converter: the switches HS and LS regulate the flow of energy supplied by the supply input to the load output:
When HS is on (that is, it is in the ON state) and LS is off (OFF), the supply input supplies energy to the load output. This time interval is called tON. When HS is off (OFF) and LS is on (ON), energy is not supplied by supply input to load output, but energy, transmitted by the power input supply during tON, is transferred to the load. This time interval is called tOFF. By switching the HS and LS transistors alternately and periodically, the energy supplied to the load output can be adequately controlled. The switching period TS is defined as the time interval in which the switching operation of the HS and LS switches is repeated. The two HS and LS switches cannot be turned on simultaneously, because this would cause a high dispersion of energy from the supply voltage towards the power ground through a direct path that would cause the wasting of a large amount of energy, being the two transistors simultaneously switched to the ON state. In real integrated circuits the simultaneous switching on of HS and LS is avoided by setting up a guard time interval in which before switching on one of the two switches, it is ensured that the other one is perfectly off.
One of the most important parameters that must be set during the design of a SWR regulator is the so-called “duty cycle”. The duty cycle is defined as the ratio between the time interval tON, in which the energy is supplied from the power supply to the output, and the TS switching period which is the sum of tON and tOFF. Shown in Figure 3 and Equation 1.
From Fig. 4 we note that the voltage drop across the inductor VL is periodic in the TS period, i.e. it is repeated at each switching period and its average value is therefore given by:
From Equation 2 (in which VIN is the supply input and VOUT is the output voltage to the load), you can see that the duty cycle D can be controlled by suitably adjusting the average value of the voltage VL(t), depending on how this is achieved. There are different types of regulators, which I will describe in the part 2 of this series.