Solido Design Automation has added an application to its Variation Designer solution that analyzes and solves well proximity effect problems that become major concerns at 90 nm and below.
The Solve Well Proximity application allows semiconductor designers to avoid heuristics-based conservative guard-banding or multiple iterations between circuit and layout.
Instead, designers are able to proactively address well proximity effects during the circuit-design stage without area sacrifices or increased design time resulting from other approaches.
For example, in a 90 nm power management system amplifier design, guard-banding area was reduced by 95 percent compared to the traditional methodology. Similarly, the design and layout time for a 65 nm high-speed display driver was reduced from 2 weeks to 1.5 days.
Solve Well Proximity can be plugged into the company's Variation Designer without the need for re-integration with their design flows.
“Adding the Solve Well Proximity application to our portfolio allows us to continue building the widest ranging, most comprehensive set of solutions to process variation problems,” said Amit Gupta, President and CEO of Solido Design Automation, in a statement.
The Solve Well Proximity application leverages foundry-provided well proximity parameters that are included in the Spice model files but are not normally used due to the lack of appropriate tools at the circuit design stage. The new application is used by a chip designer during the circuit design stage to proactively account for well proximity effects.
The designer can determine which devices are sensitive to proximity effects and by how much, and can obtain the appropriate proximity parameter values and minimum well distances. These values are back-annotated into the schematic and are then used by the layout engineer, reducing the silicon area occupied by excessive guard-banding and eliminating the time consumed by iterative post-layout simulations.
The Solve Well Proximity application is now available for use with the Variation Designer platform, and will be demonstrated at the company’s DAC booth.