Solving for electrical fast transients in your designs

Editor’s note: I am pleased to bring you another educational and informative commentary, this time by Eric Hackett, INT TRX Applications Engineer, Texas Instruments. File it away in your book of knowledge for future reference.

Although the name seems generic enough to encompass all kinds of voltage transients, electrical fast transients (EFTs) are pulses in systems that come as a result of a voltage source suddenly switching onto or off of an inductive load. Relative to other sources of voltage transients, EFTs are considered fast (hence the name) and occur frequently enough in a specific context to warrant being their own category of voltage transients.

Even with that information, you may still be wondering why EFTs matter.

Well, at a high level, EFTs matter because acceptable amounts of interference will vary from application to application and could ultimately impact your bottom line. For example, EFT strikes that couple into communication lines from lower-power applications can knock processors and/or transceivers offline, possibly causing whole modules to stop working. Additionally, applications with high power and coupling onto power lines can reach other parts of the system and cause electrical overstress due to high voltage spikes on circuits not properly protected for them.

That’s the short answer for why you should care.

However, a more detailed – and compelling reason why EFTs matter is that an application could be damaged if not properly protected from these transients. EFTs can appear as voltage spikes on signal/control lines, power lines (AC or DC), or both as a result of one coupling into the other; if EFTs are coupling into the power portion of a circuit, there is a high probability that you may see transients on the data lines as well. The net effect of these transients can range from bit errors/loss of valid communication to catastrophic damage to the product and system.

For example, in motor control applications, communication lines carry encoder data that is used mainly for precise rotor position or angle, as well as feedback information from the motor for additional safety features and predictive maintenance. This positioning is used to deliver the most power at the correct angle for peak efficiency, which is crucial in any system, but is especially important when working with the high-voltage switching waveforms of industrial motors.

When EFTs occur and corrupt these data packets in motor control applications, the known position of the rotor is lost, and the net effect is immediate power efficiency loss to the motor. In more extreme cases this can cause the motor to stop functioning completely, forcing a full power reset. EFT strikes will have an even greater effect as motor control systems improve by becoming more precise with higher resolution and data rates using technologies like Gallium Nitride (GaN) – reinforcing the need to compensate for them in designs.

Overcoming EFTs

In order to mitigate and avoid these effects, system designers should evaluate their system performance during EFT strikes and implement devices and external components based on these measurements. Devices like RS-485 transceivers are designed with EFT mitigation in mind, and will have filtering and protection components can be added to the printed circuit board (PCB), and include data redundancy or error checks as part of the communication protocol.

Now, let’s break down these steps for a better understanding of how you can solve for EFTs:

Measuring performance criteria

The level that a system performs during these strikes is described by performance criteria levels A, B, C, and D, which are defined in Table 1.

Table 1

Pass/Fail Criteria for Immunity Standards

Pass/Fail Criteria for Immunity Standards

These levels create a standard for describing device or system performance, regardless of end application or technology. Specific level requirements can be derived from this; however, the intent is to use these performance criteria as a starting point when creating applications susceptible to EMI.

To give an example of each criterion for EFT strikes in real systems, criteria C and D are fairly obvious in their descriptions. For C, the strike may stop the device and/or system from functioning correctly and it doesn’t recover on its own. As long as human intervention, such as power cycling the transceiver or re-initializing the controlling processor, allows the system to work again, the system will fall under criteria C. Criteria D is typically the result of damage from the EFT strike, where the waveform is no longer translated correctly by the transceiver, or the device will not power up and function correctly at all.

Criteria A and B can be a bit more difficult to interpret, only because what is “normal” and “specified” can be different from application to application. One difference is that criteria B has a noticeable drop in function for a very short period of time, but can recover without user intervention. For instance, the EFT causes a few bits to be missed in the communication line of a system which would require a soft reset so the processor could re-initialize, or redundancy checks could catch the bit errors and continue operation seamlessly, leaving the user none the wiser.

Incorporating external components

As I mentioned earlier, system designers can avoid the effects of EFTs by implementing external components for filtering and protection on the PCB. They can also include data redundancy or error checks as part of the communication protocol. Selecting transceiver devices designed to withstand EFTs, such as TI’s THVD1450 and THVD1550 families of noise-immune RS-485/RS-422 transceivers, will also help create a robust data link that will only further improve overall system performance.

Figure 2 shows the results of EFT testing on RS-485 transceivers, and is a good example of criteria B, and arguably criteria A, mentioned in Table 1.

In this example, there was no human intervention and the device performed as specified, only missing a portion of one bit, which would be properly interpreted at the receiving end. A simulated EFT strike is capacitively coupled onto the communication lines of two RS-485 transceivers communicating through 3m of cable. The strike seen in the screenshots is a 4kV pulse with a frequency of 100 kHz.

Figure 1

Square wave on a RS-485 transceiver experiencing a 4kV EFT strike

Square wave on a RS-485 transceiver experiencing a 4kV EFT strike

Figure 3

Square wave stopping on a RS-485 transceiver due to 4kV EFT strike

Square wave stopping on a RS-485 transceiver due to 4kV EFT strike

As you can see, the transceiver only shows the EFT pulse, then promptly recovers to continue communication without user intervention; this is how a transceiver on its own should perform if properly designed. Figure 3 is similar, but the communication halts completely for 2 to 3 bits. This is a problem and would be considered criteria B, while Figure 2 is considered criteria A.

As I mentioned before, at the transceiver level, the EFT strike is going to show up on the communication line; what is important is how well the system rejects the noise and how quickly the physical layer will communicate after the strike. The measurements show the EFT strike covering up one positive-to-negative transition; immediately after, a negative-to-positive transition occurs. Although the high bit after the EFT strike is noisy, it is still present, and in a system with redundancy checks and filtering, it would be much easier to handle an interruption due to an EFT strike then if the transceiver completely dropped communication.

Now that you know what EFTs are and why they are important, you can begin to ask the right questions and properly design your system in the industrial space. I hope this introduction to a complex topic offered insight into an avoidable issue.

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