Rambus offers a broad family of PHY Cell products on TSMC and UMC processes that are ready for your Chip and ASIC design programs.
System interface cells are delivered with a complete set of design and integration tools for layout, verification, place and route, extraction, logic and synthesis, signal integrity and timing analysis.
Rambus design engineers provide chip design consultation including pad placement, clock routing and testing. Consulting services are also available for system developers, including IC package design, board design, connector selection and system clocking analysis. This results in low risk, predictable development projects and faster design turn-around times.
For more information about the System Interfaces, visit Rambus' Web site