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The art of automating analog design

To presage the annual Design Automation Conference (DAC) in New Orleans June 21 to 25, this week's Signals section homes in on design tools for analog and mixed-signal electronic systems, where the designs flows are significantly longer and more difficult than those for digital logic. An oft-repeated maxim is that while analog will take up less than 20 percent of the circuit area of a new IC or system, the design effort required can easily consume 80 percent of allocated time.

Analog circuits, with their focus on the manipulation of voltages and currents, are so tied to specific fabrication processes, they do not readily lend themselves to design flows incorporating transferred intellectual property (IP). Designers cannot simply obtain a piece of analog IP and plunk it down in a new IC the same way they can acquire and utilize digital IP.

Similarly, the simulation of analog functions is more difficult and time-consuming than digital logic simulation. Analog simulation embodies the notion of “continuous time,” which depicts the rise and fall of currents and voltages over an unbroken time segment. Unlike digital circuits, where the notion of “discrete time” allows behavior to be modeled as a series of individual events on a time axis, continuous time often forces circuit behavior to be modeled with matrix equations and transfer functions. Thus, it can take days to complete an analog simulation of a complex circuit vs. minutes for a digital simulation.

A new problem for analog design is the simulation of radio-frequency (RF) circuits. At gigahertz frequencies, the ICs and discrete transistors become dependent on the physical dimensions of the devices. The gate and lead length of RF power amps, for example, must somehow match the wavelength of the transmitted frequency. Otherwise, the circuit transmits harmonics and noise, and even serves inadvertently as an attenuator. Thus, to the traditional problems of simulating the analog circuit, RF design adds the sensitivity to manufacturing geometries. While some simulators may do a good job of depicting electrical behavior of a device, they must also correlate this-and the potential for electromagnetic radiation-to its minute physical dimensions.

As each of the contributions to this section affirms, automating analog design-getting analog design flows to be symmetrical with digital ones-depends on fast and accurate analog simulation. Basic circuit optimization, for example, relies on the ability to simulate a circuit and vary component values to see which will yield the best performance and highest mean time between failures. However, as Tony Young, a Cadence Design Systems (San Jose) product marketing manager, points out, this depends on the design engineer's ability to alter a component value and then simulate the entire circuit with the altered value. The faster the simulator works, the more parameters and effects of altered component values can be analyzed before the design goes to silicon.

Behavioral-level modeling, its advocates believe, will significantly speed up circuit simulation. Critics argue that behavioral modeling sacrifices accuracy. Ariel Cao, Mentor Graphics Corp.'s (San Jose) strategic marketing manager, focuses on the use of high-level languages to create behavioral models. The models, he said, can reflect any level of detail.

Like Mentor, Antrim Design (Scotts Valley, Calif.) puts a lot of faith in hardware-description languages-especially analog extensions to Verilog and VHDL-for behavioral modeling. But as Leslie Spruiell, vice president of marketing, notes, these models can be enhanced by using characterization data from actual semiconductor devices. In their advocacy of HDL-based behavioral modeling, companies like Mentor and Antrim promote a top-down design flow, in which analog and mixed-signal systems, like their digital counterparts, are specified on a relatively high level of abstraction. Lower-level details are synthesized and derived relatively late in the design process. Top-down design methodologies will force a rethinking of the conventional analog design paradigm, which-linked to components, structure and process-typically proceeded from the bottom up.

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